NCP4353 datasheet(11/17 Pages) ONSEMI

Part #	NCP4353

Description	Secondary Side SMPS OFF Mode Controller for Low Standby Power

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NCP4353, NCP4354

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11

is discharged through a fixed load, by R8 and R9 faster than

output voltage on C1.

Once OFFDET pin voltage is lower than VOFFDETTH (this

threshold is derived from VOUT), OFF mode is detected. In

OFF mode SW1 is switched on to allow IDRIVEOFF current,

going through ON/OFF pin (NCP4354B) or DRIVE pin, to

keep switch off primary controller.

A higher sink current on primary FB pin is needed to keep

primary controller FB below the skip level until the OFF

mode is detected on primary side.

Despite output voltage on C1 may go down, the current

IBIASV injected into VSNS pin provides the requested offset

(VSNS voltage is higher than VREF). Primary IC should

detect OFF mode before VSNS is lower than 90% of VREF

while IBIASV is switched off to reduce consumption.

This offset, defined by R7 and the internal current source,

should be large enough to secure off mode detection of the

primary controller and avoid restart when VSNS < VREF.

Minimum Output Voltage Detection (Except

NCP4353A)

Minimum output voltage level defines primary controller

restart from OFF mode. It can be set by shared voltage

divider with voltage regulation loop. When VMIN voltage

drops below VREFM, OFF mode is ended and primary

controller restarts.

Minimum voltage level is given by Equation 5 for divider

type 1

VMIN + VREF

R4 ) R5 ) R6

R6

(eq. 5)

and for type 2 by Equation 6.

VMIN + VREF

R4 ) R5 ) R6

R5 ) R6

(eq. 6)

NCP4353A has no external adjustment and uses the

internal minimum voltage level specified by minimum

falling operation supply voltage.

LED Driver (NCP4354x only)

LED driver is active when VCC is higher than VCCMIN

and output voltage is in regulation (driver is off in OFF

mode). LED driver consists of an internal power switch

controlled by a PWM modulated logic signal and an external

current limiting resistor R3. LED current can be computed

by Equation 7.

ILED +

VOUT * VF_LED

R3

(eq. 7)

PWM modulation is used to increase efficiency of LED.

Operation in OFF Mode Description

Operation waveforms in off mode and transition into OFF

mode with NCP1246 primary controller are shown in

Figure 31.

Figure shows waveforms from the first start (1) of the

convertor. At first, primary controller’s DSS charges VCC

capacitor over the UVLO level (2). When primary VCC is

over UVLO level (3), primary controller starts to operate.

VCC capacitor is charged above DSS level from auxiliary

winding, VOUT is slowly rising according to primary

controller start up ramp to nominal voltage (4).

Primary FB pin voltage is above regulation range until

VOUT is at set level. Once VOUT is at set level, the secondary

controller starts to sink current from optocoupler LED’s and

primary FB voltage is stabilized in regulation region. With

nominal output power (without skip mode) OFFDET pin

voltage is higher than VOFFDETTH (typically 10% of VCC).

After some time, the load current decreases to low level

(5) and primary convertor uses skip mode (6) to keep

regulation of output voltage at set level. The skip mode

consists of few switching cycles followed by missing ones

to provide limited energy by light load. The number of

missing cycles allows regulation for any output power.

While both C1 and C2 are discharged during the missing

cycles, C2 discharge will be faster than C1 without output

current, VOFFDET drops below VOFFDETTH and OFF mode

is detected (7). This situation is shown in Figure 30 in detail.

When OFF mode is detected, internal pull−up current

IBIASV is switch on (7), VSNS voltage increases (due to

IBIASV) and voltage amplifier sinks full current to keep

primary FB voltage below skip level until OFF mode is

detected by the primary side controller (8). Current into

ONOFF pin or DRIVE pin begins to flow at the same time,

when entering into OFF mode (7). When OFF mode is

detected by primary side controller (8a), primary FB

injected current decreases to a lower level to reduce overall

power consumption. Optocoupler current, can also be

reduced from that time to keep the level below restart level.

Secondary side controller decreases optocoupler current

(voltage transconductance amplifier stops to sink current)

when VSNS voltage drops below VREF (9) and IBIASV is

also switch off when VSNS is lower than 90% of VREF to

reduce overall consumption. This point is defined by IBIASV

current, R6, R4 and R5 resistors and discharging time of

output capacitor C1. Discharging of C1 continues (10) until

output voltage drops below level set by voltage divider at

VMIN pin (except NCP4353A where minimum VOUT is

defined only by VCC UVLO) (11). ONOFF current stops

and thanks to internal pull−up, the primary FB voltage rises

above restart level (12) and primary controller starts

switching (13). Output capacitor C1 is recharged (14) to set

voltage. If there is still light load condition primary

controller goes to skip mode (15) again and after some time

secondary controller detects OFF mode by very light or no

load condition (16) and whole cycle is repeated.

Fast Restart From OFF Mode

The IC ends OFF mode when a load is connected to the

output and VOUT is discharged to VMIN level. There exists

another connection that allows transition to normal mode

faster without waiting some time for VOUT to discharge to

VMIN. This schematic is shown at Figure 32. The basic idea

is that C3 is discharged by the IC faster than C1 by output

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