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MC74HC125ADR2G Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74HC125ADR2G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2013 May, 2013 − Rev. 14 1 Publication Order Number: MC74HC125A/D MC74HC125A, MC74HC126A Quad 3-State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The devices have four separate output enables that are active−low (HC125A) or active−high (HC126A). Features • Output Drive Capability: 15 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the JEDEC Standard No. 7 A Requirements • Chip Complexity: 72 FETs or 18 Equivalent Gates • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION MARKING DIAGRAMS x = 5, 6 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package TSSOP−14 DT SUFFIX CASE 948G 14 1 SOIC−14 D SUFFIX CASE 751A 14 1 HC12xAG AWLYWW 1 14 HC 12xA ALYWG G 1 14 14 1 PDIP−14 N SUFFIX CASE 646 MC74HC12xAN AWLYYWWG 1 14 (Note: Microdot may be in either location) |
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