BD8152FVM, BD8158FVM

Technical Note

10/17

www.rohm.com

2011.08 - Rev.C

© 2011 ROHM Co., Ltd. All rights reserved.

In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the

output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output

capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power

the illustration.

Open loop gain

Pole at the power amplification stage

When the output current reduces, the load resistance

Ro increases and the pole frequency lowers.

Error amp phase compensation

Zero at the power amplification stage

When the output capacitor is set larger, the pole

frequency lowers but the zero frequency will not

change. (This is because the capacitor ESR

becomes 1/2 when the capacitor becomes 2 times.)

It is possible to realize the stable feedback loop by canceling the pole fp (Min.), which is created by the output capacitor

and load resistor, with CR zero compensation of the error amp as shown below.

fz (Amp.) = fp (Min.)

1

=

1

2

Rc

Cc

2

Romax

Co

As the setting range for the resistor, 1 k

to 10 k

is recommended. When the resistor is set to 1 k

or lower, the effect

by phase compensation becomes low and it may cause the oscillation of output voltage. When it is set to 10 k

or larger,

the COMP pin becomes Hi-Z and the switching noise becomes easy to superpose. Therefore the stable switching pulse

cannot be generated and the irregular ripple voltage may be generated on the output voltage.

As the setting range for the capacitance, 3,300 pF to 10,000 pF is recommended. When the capacitance is set to 3,300 pF

or lower, the irregular ripple voltage may be generated on the output voltage due to the effect of switching noise. When it is

set to 10,000 pF or larger, the response becomes worse and the output voltage fluctuation becomes large. Accordingly it

may require the output capacitor which is larger than the necessary value.

fp =

1

2

fz (ESR) =

1

2

fp (Min) =

1

[Hz]

At light-load

2

fz (Max) =

1

[Hz]

At heavy-load

2

fp (Am p.) =

1

2

fp(Min)

fp(Max)

fz(ESR)

A

0

-90

0

Gain

dB

Phase

deg

0

0

A

-90

Gain

dB

Phase

deg

Rc

Cc

Cin

Vcc,PVcc

GND,PGND

SW

COMP

Co

ESR

Ro

Vo

L

Fig. 28 Gain vs Phase

Fig. 29 Application Circuit Diagram

[Hz]

[Hz]

[Hz]

[Hz]