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OMAP-L137 Datasheet(PDF) 6 Page - Texas Instruments

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Part # OMAP-L137
Description  OMAP-L137 Low-Power Applications Processor
Download  223 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP-L137 Datasheet(HTML) 6 Page - Texas Instruments

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OMAP-L137
SPRS563F – SEPTEMBER 2008 – REVISED FEBRUARY 2013
www.ti.com
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This data manual revision history highlights the changes made to the SPRS563E device-specific data
manual to make it an SPRS563F revision.
Scope: Applicable updates to the OMAP-L137 Low-Power Applications Processor device family,
specifically relating to the OMAP-L137 device, which are all now in the production data (PD) stage of
development have been incorporated.
Silicon Revision 3.0
Digital I/O Buffers Premature Aging
456 MHz Version now PD
Revision History
SEE
ADDITIONS/MODIFICATIONS/DELETIONS
Updated/Changed Product Status on the 456-MHz Version device from “Advanced Information (AI)” to
“Production Data (PD)”
Global
Added DSP/BIOS as a Texas Instruments trademark
Section 1.3
Figure 1-1, OMAP-L137 Functional Block Diagram:
Functional Block
Added “Memory Protection” in the System Control Block
Diagram
Table 2-1, Characteristics of the OMAP-L137 Processor:
Section 2.1
Device
Updated/Changed EMIFB "16/32bit, up to 512 Mb SDRAM” to "16/32bit, up to 256 MB SDRAM”
Characteristics
Added Silicon Revisions "3.0" and "2.1" to the JTAG BSDL_ID row
Section 2.3.7
ARM Memory
Added “To improve security …” paragraph
Mapping
Section 2.5
Memory Map
Added “Note: Read/Write accesses …” sentence
Summary
Section 2.7.5
Table 2-9, External Memory Interface B (EMIFB) Terminal Functions:
External Memory
Updated/Changed EMIFB SDRAM data bus upper byte (EMB_D[31:16]) TYPE from “O” to “I/O”
Interface B (only
Updated/Changed EMB_SDCKE, C13, EMIFB SDRAM clock TYPE from “I/O” to “O”
SDRAM):
Table 2-13, Enhanced Quadrature Encoder Pulse Module (eQEP) Terminal Functions:
Section 2.7.9
Updated/Changed eQEP0 MUXED column from “SPIO” and “SPI1” to “SPI0”
Enhanced
Quadrature Encoder
Updated/Changed eQEP1 DESCRIPTION column for eQEP1 to “eQEP1A” and “eQEP1B”
Pulse Module
Split eQEP1 MUXED column for ZKB Pin No. T5 and T6
(eQEP):
Added "SIP0, GPIO, BOOT" to MUXED column for ZKB Pin No. T5
Table 2-14, Boot Mode Selection Terminal Functions:
Section 2.7.10
Boot
Updated/Changed SPI0_CLK/EQEP1I/GP5[2]/BOOT[2], T5, MUXED column from “SPIO” to “SPI0”
Section 2.7.15
Multichannel Audio
Table 2-19, Multichannel Audio Serial Ports (McASPs) Terminal Functions:
Serial Ports
Split McASP2 MUXED column for pin AXR2[0] (A5) and added “McASP2, GPIO”
(McASP0, McASP1,
McASP2)
Section 2.7.16
Table 2-20, Universal Serial Bus (USB) Terminal Functions:
Universal Serial Bus
Modules (USB0,
Updated/Changed the USB0_VDDA12 pin DESCRIPTION column and associated footnote
USB1)
Table 2-24, Reserved and No Connect Terminal Functions:
Section 2.7.20
Updated/Changed the RSV1 TYPE column from “PWR” to “-“
Reserved and No
Updated/Changed RSV2 DESCRIPTION to “… be tied either directly to CVDD or left unconnected [do
Connect
not connect to ground (VSS)]”
Section 3.1
Added “16-bit NAND” sub-bullet to NAND Flash boot
Boot Modes
6
Contents
Copyright © 2008–2013, Texas Instruments Incorporated
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