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BQ294704DSGR Datasheet(PDF) 5 Page - Texas Instruments |
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BQ294704DSGR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 20 page OUT V4 V3 V1 V2 VSS VDD CD PACK+ PACK– RIN CCD CVD RVD VOV 8 7 9 1 2 3 4 5 6 PWPD Enable Active Delay Charge/ Discharge Circuit CIN CIN CIN CIN RIN RIN RIN bq294700, bq294701, bq294702 bq294703, bq294704, bq294705 bq294707 www.ti.com SLUSB15A – SEPTEMBER 2012 – REVISED SEPTEMBER 2013 To calculate the delay, use the following equation: tCD (sec) = K × CCD (µF), where K = 10 to 20 range. (1) Example: If CCD= 0.1 µF (typical), then the delay timer range is tCD (sec) = 10 × 0.1 = 1 s (Minimum) tCD (sec) = 20 × 0.1 = 2 s (Maximum) NOTE The tolerance on the capacitor used for CCD increases the range of the tCD timer. FUNCTIONAL BLOCK DIAGRAM Figure 3 shows a CMOS Active High configuration. Figure 3. Block Diagram NOTE In the case of an Open Drain Active Low configuration, an external pull-up resistor is required on the OUT terminal. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: bq294700 bq294701 bq294702 bq294703 bq294704 bq294705 bq294707 |
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