V

OUT (V)

t

DELAY

bq771600, bq771601, bq771602, bq771604

www.ti.com

SLUSAX0A – DECEMBER 2012 – REVISED SEPTEMBER 2013

PIN FUNCTIONS

bq7716xy

Pin Name

Type I/O

Description

1

VDD

P

Power supply

2

V4

I

Sense input for positive voltage of the fourth cell from the bottom of the stack

3

V3

I

Sense input for positive voltage of the third cell from the bottom of the stack

4

V2

I

Sense input for positive voltage of the second cell from the bottom of the stack

5

V1

I

Sense input for positive voltage of the lowest cell in the stack

6

VSS

P

Electrically connected to IC ground and negative terminal of the lowest cell in the stack

7

CD

I/O

External capacitor connection for delay timer

8

OUT

OA

Output drive for overvoltage fault signal

PIN DETAILS

In the bq7716xy device, each cell is monitored independently. Overvoltage is detected by comparing the actual

circuit is activated. This timer circuit charges the CD pin to a nominal value, then slowly discharges it with a fixed

current back down to VSS. When the CD pin falls below a nominal threshold near VSS, the OUT terminal goes

from inactive to active state. Additionally, a timeout detection circuit checks to ensure that the CD pin

successfully begins charging to above VSS and subsequently drops back down to VSS, and if a timeout error is

detected in either direction, it will similarly trigger the OUT pin to become active. See Figure 2 for reference.

For an NCH Open Drain Active Low configuration, the OUT pin pulls down to VSS when active (OV present) and

is high impedance when inactive (no OV).

Figure 2. Timing for Overvoltage Sensing

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Product Folder Links: bq771600 bq771601 bq771602 bq771604