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ADS7807PB Datasheet(PDF) 7 Page - Burr-Brown (TI) |
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ADS7807PB Datasheet(HTML) 7 Page - Burr-Brown (TI) |
7 / 23 page ADS7807 7 SBAS022B www.ti.com output valid data from the previous conversion on SDATA (pin 19) synchronized to 16 clock pulses output on DATACLK (pin 18). BUSY (pin 24) will go LOW and stay LOW until the conversion is completed and the serial data has been trans- mitted. Data will be output in BTC format, MSB first, and will be valid on both the rising and falling edges of the data clock. BUSY going HIGH can be used to latch the data. All convert commands will be ignored while BUSY is LOW. The ADS7807 will begin tracking the input signal at the end of the conversion. Allowing 25 µs between convert com- mands assures accurate acquisition of a new signal. The offset and gain are adjusted internally to allow external trimming with a single supply. The external resistors compen- sate for this adjustment and can be left out if the offset and gain will be corrected in software (refer to the Calibration section). STARTING A CONVERSION The combination of CS (pin 23) and R/C (pin 22) LOW for a minimum of 40ns puts the sample-and-hold of the ADS7807 in the hold state and starts conversion ‘n’. BUSY (pin 24) will go LOW and stay LOW until conversion ‘n’ is completed and the internal output register has been updated. All new con- vert commands during BUSY LOW will be ignored. CS and/ or R/C must go HIGH before BUSY goes HIGH, or a new conversion will be initiated without sufficient time to acquire a new signal. BASIC OPERATION PARALLEL OUTPUT Figure 1a shows a basic circuit to operate the ADS7807 with a ±10V input range and parallel output. Taking R/C (pin 22) LOW for a minimum of 40ns (12 µs max) will initiate a conversion. BUSY (pin 24) will go LOW and stay LOW until the conversion is completed and the output register is up- dated. If BYTE (pin 21) is LOW, the eight Most Significant Bits (MSBs) will be valid when BUSY rises; if BYTE is HIGH, the eight Least Significant Bits (LSBs) will be valid when BUSY rises. Data will be output in Binary Two’s Complement (BTC) format. BUSY going HIGH can be used to latch the data. After the first byte has been read, BYTE can be toggled allowing the remaining byte to be read. All convert com- mands will be ignored while BUSY is LOW. The ADS7807 will begin tracking the input signal at the end of the conversion. Allowing 25 µs between convert com- mands assures accurate acquisition of a new signal. The offset and gain are adjusted internally to allow external trimming with a single supply. The external resistors compen- sate for this adjustment and can be left out if the offset and gain will be corrected in software (refer to the Calibration section). SERIAL OUTPUT Figure 1b shows a basic circuit to operate the ADS7807 with a ±10V input range and serial output. Taking R/C (pin 22) LOW for 40ns (12 µs max) will initiate a conversion and FIGURE 1a. Basic ±10V Operation, both Parallel and Serial Output. FIGURE 1b. Basic ±10V Operation with Serial Output. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NC(1) NC(1) NC(1) NC(1) NC(1) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ADS7807 Serial Output 200 Ω 66.5k Ω ±10V +5V 0.1 µF NC(1) NC(1) NC(1) 10 µF + +5V + 100 Ω ++ 2.2 µF 2.2 µF Convert Pulse BUSY 40ns min R/C SDATA DATACLK NOTE: (1) These pins should be left unconnected. They will be active when R/C is HIGH. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ADS7807 Parallel Output 200 Ω 66.5k Ω ±10V +5V 0.1 µF NC(1) 10 µF + +5V + 100 Ω B10 B9 B8 B2 B1 B0 (LSB) B13 B12 B15 (MSB) Pin 21 LOW B14 B11 B5 B4 B7 Pin 21 HIGH B6 B3 2.2 µF ++ 2.2 µF Convert Pulse BUSY R/C BYTE 40ns min NOTE: (1) SDATA (pin 19) is always active. |
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