2

®

ADS7824

SPECIFICATIONS

ELECTRICAL

ADS7824P, U

ADS7824PB, UB

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN

assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject

to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not

authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

RESOLUTION

12

Bits

ANALOG INPUT

Voltage Range

±10V

T

V

Impedance

Channel On or Off

45.7

T

k

Ω

Capacitance

35

T

pF

THROUGHPUT SPEED

Conversion Time

20

T

µs

Acquisition Time

5

T

µs

Multiplexer Settling Time

Includes Acquisition

5

T

µs

Complete Cycle (Acquire and Convert)

25

T

µs

Complete Cycle (Acquire and Convert)

CONTC = +5V

40

T

µs

Throughput Rate

40

T

kHz

DC ACCURACY

Integral Linearity Error

±0.15

±1

T

±0.5

Differential Linearity Error

±0.15

±1

T

±0.5

LSB

No Missing Codes

Guaranteed

T

0.1

T

LSB

Internal Reference

±0.5

±0.25

%

Full Scale Error Drift

Internal Reference

±7

±5

ppm/

°C

±0.5

±0.25

%

Full Scale Error Drift

±2

T

ppm/

°C

Bipolar Zero Error

±10

T

mV

Bipolar Zero Error Drift

±2

T

ppm/

°C

Channel-to-Channel Mismatch

±0.1

±0.1

%

Power Supply Sensitivity

±0.5

T

LSB

AC ACCURACY

80

90

TT

dB

Total Harmonic Distortion

–90

–80

TT

dB

Signal-to-(Noise+Distortion)

70

73

72

T

dB

Signal-to-Noise

70

73

72

T

dB

90

100

TT

dB

–3dB Bandwidth

2

T

MHz

90

T

kHz

SAMPLING DYNAMICS

Aperture Delay

40

T

ns

FS Step

5

T

µs

1

T

µs

REFERENCE

Internal Reference Voltage

2.48

2.5

2.52

TT

T

V

Internal Reference Source Current

1

T

µA

(Must use external buffer)

External Reference Voltage Range

2.3

2.5

2.7

TT

T

V

for Specified Linearity

External Reference Current Drain

100

T

µA

DIGITAL INPUTS

Logic Levels

–0.3

+0.8

TT

V

+2.4

TT

V

±10

T

µA

±10

T

µA

DIGITAL OUTPUTS

Data Format

Parallel in two bytes; Serial

T

Data Coding

Binary Two's Complement

T

+0.4

T

V

T

V

Leakage Current

±5

T

µA

Output Capacitance

High-Z State

15

T

pF