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ADS7870 Datasheet(PDF) 5 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part No. ADS7870
Description  12-Bit ADC, MUX, PGA and Internal Reference DATA ACQUISITION SYSTEM
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Maker  BURR-BROWN [Burr-Brown (TI)]
Homepage  http://www.burr-brown.com
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5
®
ADS7870
PIN #
NAME
I/O
DESCRIPTION
1
LN 0
Analog Input
MUX Input Line 0
2
LN 1
Analog Input
MUX Input Line 1
3
LN 2
Analog Input
MUX Input Line 2
4
LN 3
Analog Input
MUX Input Line 3
5
LN 4
Analog Input
MUX Input Line 4
6
LN 5
Analog Input
MUX Input Line 5
7
LN 6
Analog Input
MUX Input Line 6
8
LN 7
Analog Input
MUX Input Line 7
9
RESET
Digital Input
Master Reset zero’s all registers.
10
RISE/FALL
Digital Input
Sets the active edge for SCLK. “0” sets SCLK active on falling edge. “1” sets SCLK active on rising edge.
11
I/O 0
Digital Input/Output
Digital Input or Output signal
12
I/O 1
Digital Input/Output
Digital Input or Output signal
13
I/O 2
Digital Input/Output
Digital Input or Output signal
14
I/O 3
Digital Input/Output
Digital Input or Output signal
15
NC
No Connection
Do not connect to this pin.
16
CONVERT
Digital Input
“0” to “1” transition starts a conversion cycle.
17
BUSY
Digital Output
“1” indicates converter is busy
18
OSC ENABLE
Digital Input
“0” sets CCLK as input, “1” sets CCLK as output and turns oscillator on.
19
CCLK
Digital Input/Output
If OSC ENABLE = “1” then Internal Oscillator is output to this pin. If OSC ENABLE = “0” then this is
the input pin for an external conversion clock.
20
SCLK
Digital Input
Serial Data Input/Output Transfer Clock. Active edge set by the RISE/FALL pin. If RISE/FALL is low,
SCLK is active on the falling edge.
21
DIN
Digital Input
Serial Data Input. In the 3-wire mode, this pin is used for serial data input. In the 2-wire mode serial
data, output appears on this pin as well as the DOUT pin.
22
DOUT
Digital Output
Serial Data Output. This pin is driven when CS is low and is high impedance when CS is high. This
pin behaves the same in both 3-wire and 2-wire modes.
23
CS
Digital Input
Chip Select. When CS is low the serial interface is enabled. When CS is high the serial interface is
disabled, the DOUT pin is high impedance, and the DIN pin is an input. The CS pin only effects the
operation of the serial interface. It does not directly enable/disable the operation of the signal
conversion process.
24
VDD
Power
Power Supply Voltage, +2.7V to +5.5V.
25
GND
Power
Power Supply Ground.
26
VREF
Analog Output
2.048V/2.5V On-Chip Voltage Reference
27
BUFIN
Analog Input
Input to Reference Buffer Amplifier
28
BUFOUT/REFIN
Analog Output/Input
Output from Reference Buffer Amplifier and Reference Input to ADC.
PIN ASSIGNMENTS




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