11

®

DAC4814

FIGURE 3. Analog Connections for

±10V DAC Output.

FIGURE 4. Analog Connections for 0 to +10V DAC Output.

0 To –10V Output Range

For 0 to –10V unipolar outputs connect the DAC4814 as

shown in Figure 5. Connect the MODE to logic low (GND)

for reset to unipolar zero.

CONNECTION TO DIGITAL BUS

Cascaded Bus Connection

Multiple DAC4814s can be connected to the same CLK and

DATA input lines in two ways. Since the output of the DAC

shift register is available, any number of DAC4814s can be

cascaded on the same input bit stream as shown in Figure 6.

This arrangement allows all DACs in the system to be

updated simultaneously and requires a minimum number of

control signal inputs. However, up to 48N CLK cycles may

be required to update any given DAC, where

N = number of DAC4814s.

Parallel Bus Connection

Several DAC4814s can also have their DATA inputs con-

nected in parallel as shown in Figure 7. This allows any

DAC in the system to be updated in a maximum of 48 CLK

cycles.

20k

Ω

20k

Ω

20k

Ω

20k

Ω

10k

Ω

A

10k

Ω

V

A

OUT

V

D

OUT

10V

Ref

DAC A

DAC D

DAC4814

+

+

28

15

7

–15V

1µF

+15V

1µF

1µF

+5V

13

5

2

6

10

11

3

4

5

A

1

A

4

+

+5V

20k

Ω

20k

Ω

V

C

OUT

DAC C

8

14

9

A

3

20k

Ω

20k

Ω

V

B

OUT

DAC B

1

A

2

17

12

DGND

AGND

25

MODE

Serial

Data and

Control In

20k

Ω

20k

Ω

20k

Ω

20k

Ω

10k

Ω

A

10k

Ω

V

A

OUT

V

D

OUT

10V

Ref

DAC A

DAC D

DAC4814

+

+

28

15

7

–15V

1µF

+15V

1µF

1µF

+5V

13

5

2

6

10

11

3

4

17

12

DGND

AGND

5

A

1

A

4

+

25

MODE

20k

Ω

20k

Ω

V

C

OUT

DAC C

8

14

9

A

3

20k

Ω

20k

Ω

V

B

OUT

DAC B

1

A

2

Serial

Data and

Control In