4

®

DAC725

DISCUSSION OF

SPECIFICATIONS

DIGITAL INPUT CODES

The DAC725 accepts positive-true binary twos complement

input code, as shown in Table I. The data is loaded into

either DAC, 8 bits at a time. The data may also be clocked

into the device in a serial format.

ANALOG OUTPUT

(Binary Two's Complement,

DIGITAL INPUT CODES

Bipolar Operation, All Models)

+ Full Scale

Zero

– 1LSB

– Full Scale

TABLE I. Digital Input Codes.

ACCURACY

Linearity

This specification describes one of the most important mea-

sures of performance of a D/A converter. Linearity error is

the deviation of the analog output from a straight line drawn

through the end points (minus full-scale point and plus full-

scale point).

Differential Linearity Error

Differential Linearity Error (DLE) of a D/A converter is the

deviation from an ideal 1LSB change in the output when the

input changes from one adjacent code to the next. A differ-

ential linearity error specification of

±1/2LSB means that the

output step size can be between 1/2LSB and 3/2LSB when

the input changes between adjacent codes. A negative DLE

specification of –1LSB maximum (–0.006% for 14-bit reso-

lution) insures monotonicity.

Monotonicity

Monotonicity assures that the analog output will increase or

remain the same for increasing input digital codes. The

DAC725 is specified to be monotonic to 14 bits over the

entire specification range.

DRIFT

Gain Drift

Gain drift is a measure of the change in full-scale range

output over temperature expressed in parts per million per

degree centigrade (ppm/

°C). Gain drift is established by:

(2) calculating the gain error with respect to the +25

°C

value, and

(3) dividing by the temperature change.

The DAC725 is specified for Maximum Gain and Offset

values at temperature. This tells the system designer the

maximum that can be expected over temperature, regardless

of room temperature values.

Zero Drift

Zero drift is a measure of change in the output with 0000

H

applied to the D/A converter inputs over the specified

temperature range. This code corresponds to 0V analog

output.

to the zero error at +25

°C and is divided by the temperature

change. This drift is expressed in FSR/

°C.

SETTLING TIME

Settling time of the D/A is the total time required for the

analog output to settle within an error band around its final

value after a change in digital input. Refer to Figure 1 for

typical values for this family of products.

FIGURE 1. Final-Value Error Band Versus Full-Scale Range

Settling Time.

Settling times are specified to

±0.003% of FSR (±1/2LSB

for 14 bits) for two input conditions: a full-scale range

change of 20V (

±10V), and a 1LSB change at the “major

carry,” the point at which the worst-case settling time

occurs. This is the worst-case point since all of the input bits

change when going from one code to the next.

POWER SUPPLY SENSITIVITY

Power supply sensitivity is a measure of the effect of a

change in a power supply voltage on the D/A converter

output. It is defined as a percent of FSR change in the output

negative supply (–V

nominal power supply voltages (see Figure 2). It is specified

for DC or low frequency changes. The typical performance

curve in Figure 2 shows the effect of high frequency changes

in power supply voltages.

0.1

Settling Time (µs)

1

0.1

0.01

0.001

1

10

100