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IRMCF143TY Datasheet(PDF) 10 Page - International Rectifier |
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IRMCF143TY Datasheet(HTML) 10 Page - International Rectifier |
10 / 35 page IRMCF143S 10 www.irf.com © 2013 International Rectifier Submit Datasheet Feedback Month xx, year SDA/CS0 Input/output, I 2C Data line or SPI chip select 0 I 2C/SPI Interface SCL/SO-SI Output, I 2C clock output, or SPI data SDA/CS0 Input/output, I 2C data line or SPI chip select 0 P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock output P3.0/CS1 Input/output port 3.0, can be configured as SPI chip select 1 4.2 Motion Peripheral Interface Group PWM PWMUH Output, PWM phase U high side gate signal, internally pulled down by 58kΩ, configured high true at a power up PWMUL Output, PWM phase U low side gate signal, internally pulled down by 58kΩ, configured high true at a power up PWMVH Output, PWM phase V high side gate signal, intern ally pulled down by 58kΩ, configured high true at a power up PWMVL Output, PWM phase V low side gate signal, internally pulled down by 58kΩ, configured high true at a power up PWMWH Output, PWM phase W high side gate signal, internally pulled down by 58kΩ, configured high true at a power up PWMWL Output, PWM phase W low side gate signal, internally pulled down by 58kΩ, configured high true at a power up BRAKE Output, BRAKE output signal, internally pulled up by 70kΩ, configured low true at a power up Fault GATEKILL Input, upon assertion this negates all six PWM signals, active low, internally pulled up by 70kΩ BRAKEGK Input, upon assertion, this negates BRAKE signal, active low, internally pulled up by 70kΩ 4.3 Analog Interface Group AVSS Analog power return, (analog internal 1.8V power is shared with VDDCAP) AREF 0.6V buffered output CMEXT Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be connected. OP1+ Input, Operational amplifier positive input for application sensing OP1- Input, Operational amplifier negative input for application sensing OP1O Output, Operational amplifier output for application sensing IFBU+ Input, Operational amplifier positive input for U phase current sensing IFBU- Input, Operational amplifier negative input for U phase current sensing IFBUO Output, Operational amplifier output for U phase current sensing IFBV+ Input, Operational amplifier positive input for V phase current sensing IFBV- Input, Operational amplifier negative input for V phase current sensing IFBVO Output, Operational amplifier output for V phase current sensing VDCBUS Input, Analog input channel (0 – 1.2V), allocated for DC bus voltage input AIN1 Input, Analog input channel 1 (0 – 1.2V), allocated by MCE as speed input, needs to be pulled down to AVSS if unused |
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