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CAT35C804AJITE13 Datasheet(PDF) 8 Page - Catalyst Semiconductor |
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CAT35C804AJITE13 Datasheet(HTML) 8 Page - Catalyst Semiconductor |
8 / 14 page Preliminary CAT35C804A 8 Doc. No. 25043-00 2/98 DEVICE OPERATION INSTRUCTIONS The CAT35C804A instruction set includes 19 instruc- tions. Six instructions are related to security or write protection: DISAC Disable Access ENAC Enable Access MACC Modify Access Code OVMPR Override Memory Pointer Register RMPR Read Memory Pointer Register WMPR Write Memory Pointer Register Six instructions are READ/WRITE/ERASE instructions: ERAL Clear All Locations ERASE Clear Memory Locations READ Read Memory RSEQ Read Sequentially WRAL Write All WRITE Write memory Note: All write instructions will automatically perform a clear before writing data. Seven instructions are used as control and status func- tions: DISBSY Disable Busy ENBSY Enable Busy EWEN Program/Erase Enable EWDS Program/Erase Disable NOP No Operation ORG Select Memory Organization RSR Read Status Register UNPROTECTED MODE As shipped from the factory, the CAT35C804A is in the unprotected mode. The access code length is set to 0, and the memory pointer is at address 00 hex. While in this mode, any portion of the E2PROM array can be read or written to without an access code. A portion of the memory may be protected from any write or clear operation by setting the memory pointer to the appropri- ate address via the WMPR (Write Memory Pointer Register) instruction: WMPR [address] Figure 8. EWEN/EWDS Timing (x8 Format) 5076 FHD F11 CS DI DO OP0–OP7 OP CODE HIGH-Z Figure 9. EWEN/EWDS Timing (x16 Format) CS DI DO OP0–OP7 OP CODE HIGH-Z 5076 FHD F11 |
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