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ADP2139CB-3.3EVALZ Datasheet(PDF) 11 Page - Analog Devices |
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ADP2139CB-3.3EVALZ Datasheet(HTML) 11 Page - Analog Devices |
11 / 20 page Data Sheet ADP2138/ADP2139 Rev. C | Page 11 of 20 THEORY OF OPERATION PWM/ PSM CONTROL ILIMIT LOW CURRENT PSM COMP SOFT START UNDERVOLTAGE LOCK OUT THERMAL SHUTDOWN DRIVER AND ANTISHOOT THROUGH OSCILLATOR PWM COMP GM ERROR AMP ADP2138 VOUT MODE GND EN SW VIN Figure 33. ADP2138 Functional Block Diagram The ADP2138 and ADP2139 are step-down dc-to-dc converters that use a fixed frequency and high speed current-mode archi- tecture. The high switching frequency and tiny 6-ball WLCSP package allow for a small step-down dc-to-dc converter solution. The ADP2138/ADP2139 operate with an input voltage of 2.3 V to 5.5 V, and regulate an output voltage down to 0.8 V. CONTROL SCHEME The ADP2138/ADP2139 operate with a fixed frequency, current- mode PWM control architecture at medium to high loads for high efficiency, but shift to a power save mode control scheme at light loads to lower the regulation power losses. When operating in PWM mode, the duty cycle of the integrated switches is adjusted and regulates the output voltage. When operating in power save mode at light loads, the output voltage is controlled in a hyste- retic manner, with higher VOUT ripple. During part of this time, the converter is able to stop switching and enters an idle mode, which improves conversion efficiency. Each ADP2138/ADP2139 has a MODE pin, which determines the operation of the buck regulator in either PWM mode (when the MODE pin is set high) or power save mode (when the mode pin is set low). PWM MODE In PWM mode, the ADP2138/ADP2139 operate at a fixed frequency of 3 MHz, set by an internal oscillator. At the start of each oscillator cycle, the PFET switch is turned on, sending a positive voltage across the inductor. Current in the inductor increases until the current sense signal crosses the peak inductor current threshold that turns off the PFET switch and turns on the NFET synchronous rectifier. This sends a negative voltage across the inductor, causing the inductor current to decrease. The synchronous rectifier stays on for the rest of the cycle. The ADP2138/ADP2139 regulate the output voltage by adjusting the peak inductor current threshold. POWER SAVE MODE The ADP2138/ADP2139 smoothly transition to the power save mode of operation when the load current decreases below the power save mode current threshold. When the ADP2138 and ADP2139 enter power save mode, an offset is induced in the PWM regulation level, which makes the output voltage rise. When the output voltage reaches a level approximately 1.5% above the PWM regulation level, PWM operation turns off. At this point, both power switches are off, and the ADP2138/ ADP2139 enter into idle mode. COUT discharges until VOUT falls to the PWM regulation voltage, at which point the device drives the inductor to cause VOUT to rise again to the upper threshold. This process is repeated for as long as the load current is below the power save mode current threshold. Power Save Mode Current Threshold The power save mode current threshold is set to 100 mA. The ADP2138/ADP2139 employ a scheme that enables this current to remain accurately controlled, independent of VIN and VOUT levels. This scheme also ensures that there is very little hysteresis between the power save mode current threshold for entry to and exit from the power save mode. The power save mode current threshold is optimized for excellent efficiency across all load currents. ENABLE/SHUTDOWN The ADP2138/ADP2139 start operating with soft start when the EN pin is toggled from logic low to logic high. Pulling the EN pin low forces the device into shutdown mode, reducing the shutdown current to 0.2 μA (typical). |
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