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ADV7123-EP Datasheet(PDF) 9 Page - Analog Devices

Part # ADV7123-EP
Description  CMOS, 170 MHz, Triple, 10-Bit High Speed Video DAC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
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ADV7123-EP Datasheet(HTML) 9 Page - Analog Devices

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ADV7123-EP
Rev. 0 | Page 9 of
12
Pin No.
Mnemonic
Description
37
RSET
A resistor (RSET) connected between this pin and GND controls the magnitude of the full-scale video signal.
Note that the IRE relationships are maintained, regardless of the full-scale output current. For nominal video
levels into a doubly terminated 75 Ω load, RSET = 530 Ω.
The relationship between RSET and the full-scale output current on IOG (assuming ISYNC is connected to IOG) is
given by
RSET (Ω) = 11,445 × VREF (V)/IOG (mA)
The relationship between RSET and the full-scale output current on IOR, IOG, and IOB is given by
IOG (mA) = 11,445 × VREF (V)/RSET (Ω) (SYNC being asserted)
IOR, IOB (mA) = 7989.6 × VREF (V)/RSET (Ω)
The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC is tied
permanently low.
38
PSAVE
Power Save Control Pin. Reduced power consumption is available on the ADV7123-EP when this pin is active.
EP
Exposed Pad
The exposed paddle on the underside of the package must be soldered to the ground plane to increase the
reliability of the solder joints and to maximize the thermal capability of the package.


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