ISD3800 datasheet(7/25 Pages) TALEMA

Part #	ISD3800

Description	Digital ChipCorder with Digital Audio Interface

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Manufacturer	TALEMA [Nuvotem Talema]

Direct Link	http://www.nuvotem.com

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ISD3800

Publication Release Date: Sep 22, 2010

- 7 -

Revision 0.60

5

PIN DESCRIPTION

Number

48L-

LQFP

Pin Name

I/O

Function

1

NC

This pin should be left unconnected.

2

NC

This pin should be left unconnected.

3

NC

This pin should be left unconnected.

4

GPIO7 /

I

2S_SDI

I/O

A GPIO pin. By default this pin is a pull-high input.

Can be configured as Serial Data Input of the I

2S interface.

5

GPIO6 /

I

2S_SCK

I/O

A GPIO pin. By default this pin is a pull-high input.

Can be configured as Clock input in slave mode or clock output in

master mode. This pin can be configured as an external clock buffer

if I

2S is not used.

6

GPIO5 /

I

2S_WS

I/O

A GPIO pin. By default this pin is a pull-high input.

Can be configured as Word Select (WS) input in slave mode or WS

output in master mode.

7

GPIO4 /

I

2S_SDO

I/O

A GPIO pin. By default this pin is a pull-high input.

Can be configured as Serial Data Output of the I

2S Interface.

8

NC

This pin should be left unconnected.

9

NC

This pin should be left unconnected.

10

VSSD

I

Digital Ground.

11

VCCD

I

Digital power supply.

12

VREG

O

A 1.8V regulator to supply the internal logic. A minimum 1uF

capacitor with low ESR<0.5OHM should be connected to this pin for

supply decoupling and stability.

13

MISO /

GPIO1

O

Master-In-Slave-Out. Serial output from the ISD3800 to the host.

This pin is in tri-state when SSB=1.

Can be configured as GPIO1.

14

SCLK

I

Serial Clock input to the ISD3800 from the host.

15

SSB

I

Slave Select input to the ISD3800 from the host. When SSB is low

device is selected and responds to commands on the SPI interface.

16

MOSI /

GPIO0

I

Master-Out-Slave-In. Serial input to the ISD3800 from the host.

Can be configured as GPIO0.

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