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CS51033YN8 Datasheet(PDF) 7 Page - Cherry Semiconductor Corporation |
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CS51033YN8 Datasheet(HTML) 7 Page - Cherry Semiconductor Corporation |
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7 / 8 page  7 to rise slowly and finally it controls the Hiccup short circuit protection circuitry. This function reduces the PFET's duty cycle to 2% of the CS period. The most important consideration in calculating CS is that it’s voltage does not reach 2.5V (the voltage at which the fault detect circuitry is enabled) before VFB reaches 1.15V otherwise the power supply will never start. If the VFB pin reaches 1.15V the fault timing comparator will discharge CS and the supply will not start. For the VFB volt- age to reach 1.15V the output voltage must be at least 4 × 1.15 = 4.6V. If we choose an arbitrary startup time of 200µs we calculate the value of CS from: T = CS(min) = = 0.02µF Use 0.1µf. The fault time out time is the sum of the slow discharge time the fast discharge time and the recharge time and is obviously dominated by the slow discharge time. The first parameter is the slow discharge time, it is the time for the CS capacitor to discharge from 2.4V to 1.5V and is given by: TSLOWDISCHARGE = Where IDISCHARGE is 6µA typical. TSLOWDISCHARGE = CS × 1.5V × 105 The fast discharge time occurs when a fault is first detected. The CS capacitor is discharged from 2.5V to 2.4V. TFASTDISCHARGE = Where IFASTDISCHARGE is 66µA typical. TFASTDISCHARGE = CS × 1515 The recharge time is the time for CS to charge from 1.5V to 2.5V. TCHARGE = Where ICHARGE is 264µA typical. TCHARGE = CS × 3787 The fault time out time is given by: TFAULT = CS × (3787 + 1515 + 1.5 × 105) TFAULT = CS × 1.55 × 105 For this circuit TFAULT = 0.1 × 10-6 × 1.55 × 105 = 0.0155 A larger value of CS will increase the fault time out time but will also increase the soft start time. 8) Input Capacitor. The input capacitor reduces the peak currents drawn from the input supply and reduces the noise and ripple voltage on the VCC and VC pins. This capacitor must also ensure that the VCC remains above the UVLO voltage in the event of an output short circuit. CIN should be a low ESR capacitor of at least 100µf. A ceramic surface mount capacitor should also be connected between VCC and ground to prevent spikes. 9) MOSFET Selection The CS51033 drive a P-channel MOSFET. The VGATE pin swings from Gnd to VC. The type of PFET used depends on the operating conditions but for input voltages below 7V a logic level FET should be used. Choose a PFET with a continuous drain current (Id) rating greater than the maximum output current. RDS(on) should be less than RDS < = 167mΩ The Gate-to-Source voltage VGS and the Drain-to Source Breakdown Voltage should be chosen based on the input supply voltage. The power dissipation due to the conduction losses is given by: PD = OUT2 × RDS(on) × D The power dissipation due to the switching losses is given by: PD = 0.5 × VIN × IOUT × (TRr + TF) × FSW Where tr =Rise Time and tf= Fall Time. 10) Diode Selection. The flyback or catch diode should be a Schottky diode because of it’s fast switching ability and low forward volt- age drop. The current rating must be at least equal to the maximum output current. The breakdown voltage should be at least 20V for this 12V application. The diode power dissipation is given by: PD = IOUT × VD × (1-DMIN) 0.6V IOUT(max) CS × (2.5V-1.5V) ΙCHARGE CS × (2.5V - 2.4V) ΙFASTDISCHARGE CS × (2.4V-1.5V) ΙDISCHARGE 200µs × 264µA 2.5V CS × 2.5V ICHARGE Applications Information: continued |
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