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CS5150HGD16 Datasheet(PDF) 6 Page - Cherry Semiconductor Corporation |
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CS5150HGD16 Datasheet(HTML) 6 Page - Cherry Semiconductor Corporation |
6 / 14 page ing of the output voltage, since the noise associated with long feedback traces can be effectively filtered. Line and load regulation are drastically improved because there are two independent voltage loops. A voltage mode controller relies on a change in the error signal to compen- sate for a deviation in either line or load voltage. This change in the error signal causes the output voltage to change corresponding to the gain of the error amplifier, which is normally specified as line and load regulation. A current mode controller maintains fixed error signal under deviation in the line voltage, since the slope of the ramp signal changes, but still relies on a change in the error sig- nal for a deviation in load. The V2™ method of control maintains a fixed error signal for both line and load varia- tion, since the ramp signal is affected by both line and load. Constant Off Time To maximize transient response, the CS5150H uses a con- stant off time method to control the rate of output pulses. During normal operation, the off time of the high side switch is terminated after a fixed period, set by the COFF capacitor. To maintain regulation, the V2™ control loop varies switch on time. The PWM comparator monitors the output voltage ramp, and terminates the switch on time. Constant off time provides a number of advantages. Switch duty cycle can be adjusted from 0 to 100% on a pulse by pulse basis when responding to transient conditions. Both 0% and 100% duty cycle operation can be maintained for extended periods of time in response to load or line tran- sients. PWM slope compensation to avoid sub-harmonic oscillations at high duty cycles is avoided. Switch on time is limited by an internal 30µs timer, mini- mizing stress to the power components. Programmable Output The CS5150H is designed to provide two methods for pro- gramming the output voltage of the power supply. A four bit on board digital to analog converter (DAC) is used to program the output voltage from 2.14V to 3.54V in 100mV steps, depending on the digital input code. If all four bits are left open, the CS5150H enters adjust mode. In adjust mode, the designer can choose any output voltage by using resistor divider feedback to the VFB and VFFB pins, as in tra- ditional controllers. The CS5150H is specifically designed to be upwards compatible with the CS5155H, which uses a five bit DAC code. Start Up Until the voltage on the VCC1 supply pin exceeds the 3.9V monitor threshold, the soft start and gate pins are held low. The FAULT latch is reset (no Fault condition). The output of the error amplifier (COMP) is pulled up to 1V by the comparator clamp. When the VCC1 pin exceeds the monitor threshold, the GateH output is activated, and the soft start capacitor begins charging. The GateH output will remain on, enabling the NFET switch, until terminated by either the PWM comparator, or the maximum on time timer. If the maximum on time is exceeded before the regulator output voltage achieves the 1V level, the pulse is terminat- ed. The GateH pin drives low, and the GateL pin drives high for the duration of the extended off time. This time is set by the time out timer and is approximately equal to the maximum on time, resulting in a 50% duty cycle. The GateL pin will then drive low, the GateH pin will drive high, and the cycle repeats. When regulator output voltage achieves the 1V level pre- sent at the COMP pin, regulation has been achieved and normal off time will ensue. The PWM comparator termi- nates the switch on time, with off time set by the COFF capacitor. The V2™ control loop will adjust switch duty cycle as required to ensure the regulator output voltage tracks the output of the error amplifier. The soft start and COMP capacitors will charge to their final levels, providing a controlled turn on of the regulator output. Regulator turn on time is determined by the COMP capacitor charging to its final value. Its voltage is limited by the soft start COMP clamp and the voltage on the soft start pin (see Figures 2 and 3). Figure 2: CS5150H demonstration board startup in response to increas- ing 12V and 5V input voltages. Extended off time is followed by normal off time operation when output voltage achieves regulation to the error amplifier output. Figure 3: CS5150H demonstration board startup waveforms. Trace 1 - Regulator Output Voltage (1V/div.) Trace 3 - COMP Pin (error amplifier output) (1V/div.) Trace 4 - Soft Start Pin (2V/div.) Trace 1 - Regulator Output Voltage (1V/div.) Trace 2 - Inductor Switching Node (2V/div.) Trace 3 - 12V input (VCC1 and VCC2) (5V/div.) Trace 4 - 5V Input (1V/div.) Applications Information: continued 6 |
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