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CS5166GDW16 Datasheet(PDF) 8 Page - Cherry Semiconductor Corporation |
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CS5166GDW16 Datasheet(HTML) 8 Page - Cherry Semiconductor Corporation |
8 / 22 page The first range is 2.125V to 3.525V in 100mV steps, the sec- ond is 1.325V to 2.075V in 50mV steps, depending on the digital input code. If all five bits are left open, the CS5166 enters adjust mode. In adjust mode, the designer can choose any output voltage by using resistor divider feed- back to the VFB pin, as in traditional controllers. The CS5166 is specifically designed to meet or exceed Intel’s Pentium® II specifications. Start-up Until the voltage on the VCC Supply pin exceeds the 3.95V monitor threshold, the Soft Start and Gate pins are held low. The Fault latch is Reset (no Fault condition). The out- put of the Error Amp (COMP) is pulled up to 1V by the Comp Clamp. When the VCC pin exceeds the monitor threshold, the GATE(H) output is activated, and the Soft Start Capacitor begins charging. The GATE(H) output will remain on, enabling the NFET switch, until terminated by either the PWM Comparator, or the Maximum On-Time Timer. If the Maximum On-Time is exceeded before the regulator output voltage achieves the 1V level, the pulse is terminat- ed. The GATE(H) pin drives low, and the GATE(L) pin drives high for the duration of the Extended Off-Time. This time is set by the Time-out Timer and is approximately equal to the Maximum On-Time, resulting in a 50% Duty Cycle. The GATE(L) Pin will then drive low, the GATE(H) pin will drive high, and the cycle repeats. When regulator output voltage achieves the 1V level pre- sent at the Comp pin, regulation has been achieved and normal Off-Time will ensue. The PWM comparator termi- nates the switch On-Time, with Off-Time set by the COFF Capacitor. The V2 TM control loop will adjust switch Duty Cycle as required to ensure the regulator output voltage tracks the output of the Error Amp. The Soft Start and Comp capacitors will charge to their final levels, providing a controlled turn-on of the regulator output. Regulator turn-on time is determined by the Comp capacitor charging to its final value. Its voltage is limited by the Soft Start Comp clamp and the voltage on the Soft Start pin. Figure 3: Demonstration board startup in response to increasing 12V and 5V input voltages. Extended off time is followed by normal off time operation when output voltage achieves regulation to the error amplifier output. Figure 4: Demonstration board startup waveforms. Figure 5: Demonstration board enable startup waveforms. Normal Operation During Normal operation, Switch Off-Time is constant and set by the COFF capacitor. Switch On-Time is adjusted by the V2 TM Control loop to maintain regulation. This results in changes in regulator switching frequency, duty cycle, and output ripple in response to changes in load and line. Output voltage ripple will be determined by inductor rip- ple current and the ESR of the output capacitors (see Figures 6 and 7). Trace 1 - Regulator Output Voltage (5V/div.) Trace 2 - Inductor Switching Node (5V/div.) Trace 1 - Regulator Output Voltage (1V/div.) Trace 3 - COMP Pin (error amplifier output) (1V/div.) Trace 4 - Soft Start Pin (2V/div.) Trace 1 - Regulator Output Voltage (1V/div.) Trace 2 - Inductor Switching Node (2V/div.) Trace 3 - 12V input (VCC) (5V/div.) Trace 4 - 5V Input (1V/div.) 8 Application Information: continued |
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