DS18S20

8 of 27

1-WIRE CRC CODE Figure 6

MEMORY

The DS18S20’s memory is organized as shown in Figure 7. The memory consists of a scratchpad RAM

and a nonvolatile, electrically erasable (E

and TL. The scratchpad helps insure data integrity when communicating over the 1–Wire bus. Data is

first written to the scratchpad where it can be read back.

After the data has been verified, a copy

scratchpad command will transfer the data to the nonvolatile (E

integrity when modifying the memory. The DS18S20 EEPROM is rated for a minimum of 50,000 writes

and 10 years data retention at T = +55°C.

The scratchpad is organized as 8 bytes of memory. The first 2-bytes contain the measured temperature

information. The third and fourth bytes are volatile copies of TH and TL and are refreshed with every

power–on reset. The next 2 bytes are not used; upon reading back, however, they will appear as all logic

“1s”.

The seventh and eighth bytes are count registers, which may be used in obtaining higher

temperature resolution (see “Operation–measuring Temperature” section). There is a ninth byte which

may be read with a Read Scratchpad command. This byte contains a cyclic redundancy check (CRC)

byte which is the CRC over all of the 8 previous bytes.

This CRC is implemented in the fashion

described in the section titled “CRC Generation."

DS18S20 MEMORY MAP Figure 7

TEMPERATURE LSB

TEMPERATURE MSB

TH/USER BYTE 1

TL/USER BYTE 2

RESERVED

COUNT REMAIN

COUNT PER °C

CRC

TH/USER BYTE 1

TL/USER BYTE 2

RESERVED

SCRATCHPAD

BYTE

0

1

2

3

4

5

6

7

8

E

(MSB)

(LSB)

XOR

XOR

XOR

INPUT