LPC1517JBD64 datasheet(86/99 Pages) NXP

Part #	LPC1517JBD64

Description	32-bit ARM Cortex-M3 microcontroller; up to 256 kB flash and 36 kB SRAM

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Manufacturer	NXP [NXP Semiconductors]

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LPC15XX

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Product data sheet

Rev. 1 — 19 February 2014

86 of 99

NXP Semiconductors

LPC15xx

32-bit ARM Cortex-M3 microcontroller

In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF

(Figure 46), with an amplitude between 200 mV (RMS) and 1000 mV (RMS). This

corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V.

The XTALOUT pin in this configuration can be left unconnected.

External components and models used in oscillation mode are shown in Figure 47 and in

Table 32 and Table 33. Since the feedback resistance is integrated on chip, only a crystal

and the capacitances CX1 and CX2 need to be connected externally in case of

fundamental mode oscillation (the fundamental frequency is represented by L, CL and

RS). Capacitance CP in Figure 47 represents the parallel package capacitance and should

not be larger than 7 pF. Parameters FOSC, CL, RS and CP are supplied by the crystal

manufacturer (see Table 32).

Fig 46. Slave mode operation of the on-chip oscillator

Fig 47. Oscillator modes and models: oscillation mode of operation and external crystal

model used for CX1/CX2 evaluation

Table 32.

Recommended values for CX1/CX2 in oscillation mode (crystal and external

components parameters) low frequency mode

Fundamental oscillation

frequency FOSC

Crystal load

capacitance CL

Maximum crystal

series resistance RS

External load

capacitors CX1, CX2

1 MHz to 5 MHz

10 pF

< 300



18 pF, 18 pF

20 pF

< 300



39 pF, 39 pF

30 pF

< 300



57 pF, 57 pF

LPC1xxx

XTALIN

Ci

100 pF

Cg

002aae788

002aaf424

LPC1xxx

XTALIN

XTALOUT

CX2

CX1

XTAL

=

CL

CP

RS

L

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