SAP5S / SAP51

Universal Actuator-Sensor Interface IC

Data Sheet

July 17, 2012

© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 3.1

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

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List of Figures

Figure 1 SAP5 Package Pin Assignment for the 20 pin version ........................................................................ 13

 

Figure 2 SAP5 Package Pin Assignment for the 16 pin version ........................................................................ 13

 

Figure 3: Functional Block Diagram ................................................................................................................... 14

 

Figure 4: Data path in Master-, Repeater- and Monitor-Mode ............................................................................. 1

 

Figure 5: Receiver comparator threshold set-up in principle.............................................................................. 31

 

Figure 6: Timing Diagram Parameter Port P0 ... P3, PSTBn ............................................................................. 33

 

Figure 7: Timing diagram data port D0 ... D3 and DSTBn ................................................................................. 34

 

Figure 8: Principle of Delay Mode input filtering (exemplary for Slave with Address 1)..................................... 35

 

Figure 9: Power-On Behavior (all modes) .......................................................................................................... 43

 

Figure 10: Timing diagram external Reset via DSTBn ....................................................................................... 44

 

Figure 11: Safety Mode Data Processing........................................................................................................... 49

 

Figure 12: Data Input Voltage Constraints in Safety Mode ................................................................................ 50

 

Figure 13: SAP Package Pin Assignment in Master/Repeater Mode ................................................................ 51

 

Figure 14: Standard Application circuit, direction of Data I/O depends on IO_Code ......................................... 57

 

Figure 15: Safety Mode Application.................................................................................................................... 58

 

Figure 16: SAP5 Master Mode Application......................................................................................................... 59

 

Figure 17: Package Drawings and Dimensions for the SOP16/SOP20-300mil versions .................................. 60

 

Figure 18: Package Marking 20 pin version ....................................................................................................... 61

 

Figure 19: Package Marking 16 pin version ....................................................................................................... 61

 

List of Tables

Table 1: Absolute Maximum Ratings.................................................................................................................... 9

 

Table 2: Operating Conditions............................................................................................................................ 10

 

Table 3: Crystal Frequency ................................................................................................................................10

 

Table 4: SAP5 Pin List........................................................................................................................................ 12

 

Table 5: Assignment of operational modes ........................................................................................................ 16

 

Table 6: SAP5 Master Calls and Related Slave Responses.............................................................................. 20

 

Table 7: SAP5 Additional Master Calls for Slave Configuration......................................................................... 21

 

Table 8: E²PROM Read and Write Times ......................................................................................................... 22

 

Table 9: SAP5 E²PROM - User and Firmware Area Content............................................................................ 24

 

Table 10: SAP5 E²PROM - User and Firmware Area Programming................................................................. 25

 

Table 11: SAP5 E²PROM - Safety Area Content .............................................................................................. 26

 

Table 12: Properties of voltage output pins UOUT and U5R ............................................................................. 28

 

Table 13: AS-i Bus Load Properties ................................................................................................................... 29

 

Table 14: CDC pin parameters ........................................................................................................................... 29

 

Table 15: Cut Off Temperature........................................................................................................................... 29

 

Table 16: DC Characteristics of digital high voltage input pins .......................................................................... 30

 

Table 17: DC Characteristics of digital high voltage output pins ........................................................................ 30

 

Table 18: Receiver Parameters .......................................................................................................................... 31

 

Table 19: Transmitter Current Amplitude ........................................................................................................... 31

 

Table 20: Timing Parameter Port ....................................................................................................................... 32

 

Table 21: Timing Data Port Outputs ................................................................................................................... 34

 

Table 22: Activation of Delay Mode.................................................................................................................... 35

 

Table 23: Activation of Synchronous Mode ........................................................................................................ 36

 

Table 24: Meaning of master call bits I0 … I3 in Ext_Addr_4I/4O_Mode .......................................................... 38