C8051F124-GQR datasheet(47/350 Pages) SILABS | Mixed Signal ISP Flash MCU Family

Part No.	C8051F124-GQR

Description	Mixed Signal ISP Flash MCU Family

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Manufacturer	SILABS [Silicon Laboratories]

Direct Link	http://www.silabs.com

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C8051F120/1/2/3/4/5/6/7

C8051F130/1/2/3

Rev. 1.4

47

A8m/A0/P6.0

80

D I/O Bit 8 External Memory Address bus (Multiplexed

mode)

Bit 0 External Memory Address bus (Non-multi-

plexed mode)

Port 6.0

See Port Input/Output section for complete

description.

A9m/A1/P6.1

79

D I/O Port 6.1. See Port Input/Output section for com-

plete description.

A10m/A2/P6.2

78

D I/O Port 6.2. See Port Input/Output section for com-

plete description.

A11m/A3/P6.3

77

D I/O Port 6.3. See Port Input/Output section for com-

plete description.

A12m/A4/P6.4

76

D I/O Port 6.4. See Port Input/Output section for com-

plete description.

A13m/A5/P6.5

75

D I/O Port 6.5. See Port Input/Output section for com-

plete description.

A14m/A6/P6.6

74

D I/O Port 6.6. See Port Input/Output section for com-

plete description.

A15m/A7/P6.7

73

D I/O Port 6.7. See Port Input/Output section for com-

plete description.

AD0/D0/P7.0

72

D I/O Bit 0 External Memory Address/Data bus (Multi-

plexed mode)

Bit 0 External Memory Data bus (Non-multi-

plexed mode)

Port 7.0

See Port Input/Output section for complete

description.

AD1/D1/P7.1

71

D I/O Port 7.1. See Port Input/Output section for com-

plete description.

AD2/D2/P7.2

70

D I/O Port 7.2. See Port Input/Output section for com-

plete description.

AD3/D3/P7.3

69

D I/O Port 7.3. See Port Input/Output section for com-

plete description.

AD4/D4/P7.4

68

D I/O Port 7.4. See Port Input/Output section for com-

plete description.

Table 4.1. Pin Definitions (Continued)

Name

Pin Numbers

Type

Description

‘F120

‘F122

‘F124

‘F126

‘F121

‘F123

‘F125

‘F127

‘F130

‘F132

‘F131

‘F133

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C8051F124-GQR Datasheet(PDF) 47 Page - Silicon Laboratories

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