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C8051F124-GQR Datasheet(PDF) 60 Page - Silicon Laboratories

Part # C8051F124-GQR
Description  Mixed Signal ISP Flash MCU Family
Download  350 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F124-GQR Datasheet(HTML) 60 Page - Silicon Laboratories

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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
60
Rev. 1.4
SFR Definition 5.1. AMX0CF: AMUX0 Configuration
Bits7–4: UNUSED. Read = 0000b; Write = don’t care.
Bit3:
AIN67IC: AIN0.6, AIN0.7 Input Pair Configuration Bit.
0: AIN0.6 and AIN0.7 are independent single-ended inputs.
1: AIN0.6, AIN0.7 are (respectively) +, – differential input pair.
Bit2:
AIN45IC: AIN0.4, AIN0.5 Input Pair Configuration Bit.
0: AIN0.4 and AIN0.5 are independent single-ended inputs.
1: AIN0.4, AIN0.5 are (respectively) +, – differential input pair.
Bit1:
AIN23IC: AIN0.2, AIN0.3 Input Pair Configuration Bit.
0: AIN0.2 and AIN0.3 are independent single-ended inputs.
1: AIN0.2, AIN0.3 are (respectively) +, – differential input pair.
Bit0:
AIN01IC: AIN0.0, AIN0.1 Input Pair Configuration Bit.
0: AIN0.0 and AIN0.1 are independent single-ended inputs.
1: AIN0.0, AIN0.1 are (respectively) +, – differential input pair.
Note:
The ADC0 Data Word is in 2’s complement format for channels configured as differential.
SFR Page:
SFR Address:
0
0xBA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
-
-
-
AIN67IC
AIN45IC
AIN23IC
AIN01IC 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0


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