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C8051F124-GQR Datasheet(PDF) 31 Page - Silicon Laboratories

Part No. C8051F124-GQR
Description  Mixed Signal ISP Flash MCU Family
Download  350 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F124-GQR Datasheet(HTML) 31 Page - Silicon Laboratories

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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Rev. 1.4
31
1.4.
16 x 16 MAC (Multiply and Accumulate) Engine
The C8051F120/1/2/3 and C8051F130/1/2/3 devices include a multiply and accumulate engine which can
be used to speed up many mathematical operations. MAC0 contains a 16-by-16 bit multiplier and a 40-bit
adder, which can perform integer or fractional multiply-accumulate and multiply operations on signed input
values in two SYSCLK cycles. A rounding engine provides a rounded 16-bit fractional result after an addi-
tional (third) SYSCLK cycle. MAC0 also contains a 1-bit arithmetic shifter that will left or right-shift the con-
tents of the 40-bit accumulator in a single SYSCLK cycle.
Figure 1.10. MAC0 Block Diagram
MAC0CF
MAC0STA
16 x 16 Multiply
MAC0RNDH
MAC0RNDL
MAC0 Rounding Register
MAC0OVR
MAC0ACC3
MAC0ACC2
MAC0ACC1
MAC0ACC0
MAC0 Accumulator
40 bit Add
MAC0MS
1
0
0
Rounding Engine
1 bit Shift
MAC0FM
Flag Logic
MAC0BH
MAC0BL
MAC0 B Register
MAC0AH
MAC0AL
MAC0 A Register


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