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L4938NND Datasheet(PDF) 7 Page - STMicroelectronics |
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L4938NND Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 12 page Obsolete Product(s) - Obsolete Product(s) RESET CIRCUIT The block circuit diagram of the reset circuit is shown in fig. 4. The reset circuit supervises the standby out- put voltage. The reset threshold of 4.7V is defined by the internal reference voltage and the standby output divider. The reset pulse delay time tRD, is defined by the charge time of an external capacitor CT : CT x 2V tRD = 2 µA The reaction time of the reset circuit depends on the discharge time limitation of the reset capacitor CT and is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity. In fact, if the standby output voltage drops below the reset threshold for a time shorter than the reaction time tRR, no reset output variation occurs. The nominal reset delay is generated for standby output voltage drops longer than the time necessary for the complete discharging of the ca- pacitor CT. This time is typically equal to 50 µs if CT = 100nF. The typical reset output waveforms are shown in fig. 5. SENSE COMPARATOR This circuit compares an input signal with an internal voltage reference of typically 1.23V. The use of an external voltage divider makes the comparator very flexible in the application. This function can be used to supervise the input voltage - either before or after the protection diode - and to give additional informa- tion to the microprocessor such as low voltage warn- ings. If this feature is not used SI and SO have to con- nected to GND. In this case the St-by quiescent cur- rent (14V) increases from 290 µA to 300µA. Figure 4: Block Diagram of the Reset Circuit. L4938N - L4938ND - L4938NPD 7/12 |
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