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EP2AGX45 Datasheet(PDF) 42 Page - Altera Corporation

Part # EP2AGX45
Description  Device Interfaces and Integration
Download  380 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2AGX45 Datasheet(HTML) 42 Page - Altera Corporation

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2–12
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Arria II Devices
Adaptive Logic Modules
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010
Altera Corporation
Carry Chain
The carry chain provides a fast carry function between the dedicated adders in
arithmetic or shared arithmetic mode. The two-bit carry select feature in Arria II
devices halves the propagation delay of carry chains within the ALM. Carry chains
can begin in either the first ALM or the fifth ALM in a LAB. The final carry-out signal
is routed to an ALM, where it is fed to local, row, or column interconnects.
The Quartus II Compiler automatically creates carry chain logic during design
processing, or you can create it manually during design entry. Parameterized
functions such as LPM automatically take advantage of carry chains for the
appropriate functions.
The Quartus II Compiler creates carry chains longer than 20 ALMs (10 ALMs in
arithmetic or shared arithmetic mode) by linking LABs together automatically. To
enhance fitting, a long carry chain runs vertically, allowing fast horizontal connections
to TriMatrix memory and DSP blocks. A carry chain can continue as far as a full
column.
To avoid routing congestion in one small area of the device when a high fan-in
arithmetic function is implemented, the LAB can support carry chains that only use
either the top half or bottom half of the LAB before connecting to the next LAB. This
leaves the other half of the ALMs in the LAB available for implementing narrower
fan-in functions in normal mode. Carry chains that use the top five ALMs in the first
LAB carry into the top half of the ALMs in the next LAB in the column. Carry chains
that use the bottom five ALMs in the first LAB carry into the bottom half of the ALMs
in the next LAB within the column. In every alternate LAB column, the top half can be
bypassed; in the other MLAB columns, the bottom half can be bypassed.
1 For more information on carry chain interconnect, refer to “ALM Interconnects” on
page 2–17.


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