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AD7625BCPZ Datasheet(PDF) 5 Page - Analog Devices

Part # AD7625BCPZ
Description  16-Bit, 6 MSPS, PulSAR Differential ADC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7625BCPZ Datasheet(HTML) 5 Page - Analog Devices

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Data Sheet
AD7625
Rev. A | Page 5 of 24
TIMING SPECIFICATIONS
VDD1 = 5 V; VDD2 = 2.5 V; VIO = 2.37 V to 2.63 V; REF = 4.096 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
Symbol
Min
Typ
Max
Unit
Time Between Conversions1
t
CYC
166
10,000
ns
Acquisition Time
t
ACQ
40
ns
CNV± High Time
t
CNVH
10
40
ns
CNV± to D± (MSB) Delay
t
MSB
145
ns
CNV± to Last CLK± (LSB) Delay
t
CLKL
110
ns
CLK± Period2
t
CLK
(t
CYC − tMSB + tCLK)/n
4
3.33
ns
CLK± Frequency
f
CLK
250
300
MHz
CLK± to DCO± Delay (Echoed-Clock Mode)
t
DCO
0
4
7
ns
DCO± to D± Delay (Echoed-Clock Mode)
t
D
0
1
ns
CLK± to D± Delay
t
CLKD
0
4
7
ns
1 The maximum time between conversions is 10,000 ns. If CNV± is left idle for a time greater than the maximum value of t
CYC, the subsequent conversion result is invalid.
2 For the minimum CLK period, the window available to read data is t
CYC − tMSB + tCLK. Divide this time by the number of bits (n) that are read. In echoed-clock interface
mode, n = 16; in self-clocked interface mode, n = 18.


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