ACT8891

Rev 1, 06-Sep-13

- 6 -

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Copyright © 2013 Active-Semi, Inc.

Active-Semi Proprietary―For Authorized Recipients and Customers

ActivePMU

PIN DESCRIPTIONS CONT’D

PIN

NAME

DESCRIPTION

25

NC3

Connect NC3 to GA.

26

VP2

Power Input for REG2 and System Control. Bypass to GP2 with a high quality ceramic capacitor

placed as close to the IC as possible.

27

SW2

Switching Node Output for REG2. Connect this pin to the switching end of the inductor.

28

GP2

Power Ground for REG2. Connect GA, GP1,GP2 and GP3 together at a single point as close to

the IC as possible.

29

GP1

Power Ground for REG1. Connect GA, GP1,GP2 and GP3 together at a single point as close to

the IC as possible.

30

SW1

Switching Node Output for REG1. Connect this pin to the switching end of the inductor.

31

VP1

Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close to

the IC as possible.

32

REFBP

Reference Bypass. Connect a 0.047μF ceramic capacitor from REFBP to GA. This pin is

discharged to GA in shutdown.

EP

EP

Exposed Pad. Must be soldered to ground on PCB.

24

OUT2

Output Feedback Sense for REG2. Connect this pin directly to the output node to connect the

internal feedback network to the output voltage.

23

VDDREF

Power supply for the internal reference. Connect this pin directly to the system power supply.

Bypass VDDREF to GA with a 1µF capacitor placed as close to the IC as possible. Star

connection with VP1, VP2 and VP3 preferred.