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A6281EESTR-T Datasheet(PDF) 3 Page - Allegro MicroSystems |
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A6281EESTR-T Datasheet(HTML) 3 Page - Allegro MicroSystems |
3 / 11 page 3-Channel Constant Current LED Driver with Programmable PWM Control A6281 3 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com OUT2 OUT1 OUT0 Regulator 800 kHz Clock To PWM Counters To logic To PWM Counters Current Regulator 0 Current Regulator 1 Current Regulator 2 Latched Registers REXT REXT LGND PGND OEO OEI VIN VREG LI LO Shift Register SDI CI SDO CO 100 ns One-Shot Terminal List Table Number Name Description 1 REXT An external resistor at this terminal establishes maximum output current 2 VREG Regulator decoupling 3 LGND Logic ground 4 VIN Chip power supply voltage; connect to VREG externally if 4.75 V < VIN < 5.5 V 5 CI Serial clock input; PWM clock if external clock is selected 6 OEI Output enable input; when low (active), the output drivers are enabled; when high (inactive), all output drivers are turned off (blanked) 7 LI Latch input terminal; serial data is latched with high-level input 8 SDI Serial data input to shift register 9 OUT2 Sinking output terminal 10 PGND Power ground 11 OUT1 Sinking output terminal 12 OUT0 Sinking output terminal 13 SDO Buffered serial data output after shift register 14 LO Buffered latch output 15 OEO Buffered output enable output 16 CO Buffered clock output – PAD Exposed thermal pad, not internally connected; connect externally to LGND and PGND. Pin-out Drawings Functional Block Diagram 12 11 10 9 1 2 3 4 OUT0 OUT1 PGND OUT2 REXT VREG LGND VIN PAD |
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