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L4995RKTR Datasheet(PDF) 6 Page - STMicroelectronics |
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L4995RKTR Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 35 page Block diagrams and pins descriptions L4995 6/35 Doc ID 13103 Rev 14 Figure 3. Block diagram of L4995R Table 2. Pins descriptions Pin name PowerSSO-12 pin # PowerSSO-24 pin # Function En 1 13, 14, 15 Enable input (L4995 and L4996A only, otherwise not connected). If high regulator, watchdog and reset are operating. If low regulator, watchdog and reset are shutdown. Connect to Vs if not used. NC 2, 4, 8 3, 5, 6, 9, 11 Not connected. GND 3 16, 17, 18 Ground reference. - TAB TAB, 1, 12 Substrate of the chip: connect the pins or the TAB to GND. Res 5 19, 20, 21 Reset output. It is pulled down when output voltage goes below Vo_th or frequency at Wi is too low. Leave floating if not used. Vcr 6 22, 23, 24 Reset timing adjust. A capacitor between Vcr pin and GND. Sets the reset delay time (trd). Leave floating if Reset is not used. Vcw 72 Watchdog timer adjust (L4995 only, otherwise not connected). A capacitor between Vcw pin and GND. Sets the time response of the watchdog monitor. |
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