ADC12L080

SNAS200A – OCTOBER 2004 – REVISED OCTOBER 2004

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Pin No.

Symbol

Equivalent Circuit

Description

14–19,

Digital data output pins that make up the 12-bit conversion results.

D0–D11

22–27

D0 is the LSB, while D11 is the MSB of the output word.

(5)

ANALOG POWER

Positive analog supply pins. These pins should be connected to a

quiet +3.3V source and bypassed to AGND with 0.1 µF low ESL

5, 6, 29

capacitors located within 1 cm of these power pins, and with a 10 µF

capacitor.

4, 7, 28

AGND

The ground return for the analog supply.

DIGITAL POWER

Positive digital supply pin. This pin should be connected to the same

13

monolithic capacitor in parallel with a 10 µF capacitor, both located

within 1 cm of the power pin.

9, 12

DGND

The ground return for the digital supply.

Positive digital supply pin for the ADC12L080's output drivers. This

pin should be connected to a voltage source in the range indicated in

the Operating Ratings table and be bypassed to DR GND with a 0.1

µF capacitor. If the supply for this pin is different from the supply

21

capacitor. The voltage at this pin should never exceed the voltage on

within 1 cm of the supply pin.

The ground return for the digital supply for the ADC12L080's output

drivers. This pin should be connected to the system digital ground,

20

DR GND

but not be connected in close proximity to the ADC12L080's DGND

or AGND pins. See Section 6.0 (Layout and Grounding) for more

details.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

4

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