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TLV320DAC3101 Datasheet(PDF) 2 Page - Texas Instruments |
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TLV320DAC3101 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 101 page Serial Interface and Clocks SDIN BCLK WCLK MCLK PLL HPVDD HPVSS SPRVDD SPRVSS AVDD AVSS SPLVSS SPLVDD VOL/MICDET SCL SDA GPIO GPIO1 DAC DAC MIXER P1/R35 RESET DVDD DVSS IOVDD IOVSS AIN2 AIN2 AIN1 AIN1 2V/2.5V/AVDD MICBIAS Note:Normally, MCLKisPLL input; however,BCLKor GPIO1canalsobe PLL input. AudioOutputStage PowerManagement De-Pop and SoftStart RCCLK P1/R33–R34 P1/R46 I C 2 LeftDAC RightDAC SPLP SPLM Class-DSpeaker Driver 6dBto24dB (6-dBsteps) Analog Attenuation 0dBto –78dB andMute (0.5-dBsteps) P1/R42 P1/R38 Class A/B Headphone/Lineout Driver 0dBto9dB (1-dBsteps) Analog Attenuation HPL P1/R36 P1/R40 P1/R30–R31 L Data L Data RData RData (L+R)/2Data (L+R)/2Data P0/R63/D3–D2 P0/R63/D5–D4 P0/R116 7-Bit Vol ADC LeftandRight Volume-ControlRegister P0/R117 DigitalVol 24dBto Mute Process- ing Blocks P0/R64–R66 S 0dBto –78dB andMute (0.5-dBsteps) SPRP SPRM Class-DSpeaker Driver 6dBto24dB (6-dBsteps) Analog Attenuation 0dBto –78dB andMute (0.5-dBsteps) P1/R43 P1/R39 Class A/B Headphone/Lineout Driver 0dBto9dB (1-dBsteps) Analog Attenuation HPR P1/R37 P1/R41 P1/R30–R31 S 0dBto –78dB andMute (0.5-dBsteps) B0360-02 TLV320DAC3101 SLAS666A – JANUARY 2010 – REVISED MAY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Figure 1-1. Functional Block Diagram 2 INTRODUCTION Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TLV320DAC3101 |
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