LM3668

SNVS449L – JUNE 2007 – REVISED MARCH 2011

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Absolute Maximum Ratings

(1) (2) (3)

−0.2V to +6.0V

FB, EN, MODE, and SYNC pins

PGND to SGND

-0.2V to 0.2V

Internally Limited

+125°C

Storage Temperature Range

−65°C to +150°C

Maximum Lead Temperature (Soldering, 10 sec)

+260°C

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under

which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed

performance limits and associated test conditions, see the Electrical Characteristics tables.

(2)

The Human body model is a 100pF capacitor discharged through a 1.5 k

Ω resistor into each pin. The machine model is a 200pF

capacitor discharged directly into each pin. MIL-STD-883 3015.7

(3)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(4)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

part/package in the application (

Operating Ratings

Input Voltage Range

2.5V to 5.5V

Recommended Load Current

0mA to 1A

−40°C to +125°C

(1)

−40°C to +85°C

(1)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

part/package in the application (

Thermal Properties

Junction-to-Ambient Thermal Resistance (

34°C/W

(1)

Junction-to-ambient thermal resistance (

forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 101.6mm x 76.2mm x 1.6mm. Thickness of

the copper layers are 2oz/1oz/1oz/2oz. The middle layer of the board is 60mm x 60mm. Ambient temperature in simulation is 22°C, still

air. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power

dissipation exists, special care must be paid to thermal dissipation issues in board design.

4

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