300 ns

0.2

L

-

LM3402, LM3402HV

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SNVS450D – SEPTEMBER 2006 – REVISED FEBRUARY 2010

AVERAGE LED CURRENT ACCURACY

The COT architecture regulates the valley of

current (which is also the average inductor current) the valley inductor current is calculated using the following

expression:

(4)

(5)

Detailed information for the calculation of

MAXIMUM OUTPUT VOLTAGE

(6)

(7)

At low switching frequency the maximum duty cycle and output voltage are higher, allowing the LM3402/02HV to

regulate output voltages that are nearly equal to input voltage. The following equation relates switching frequency

to maximum output voltage.

(8)

MINIMUM OUTPUT VOLTAGE

minimum duty cycle and output voltage that can be regulated based on input voltage and switching frequency.

The relationship is determined by the following equation:

(9)

HIGH VOLTAGE BIAS REGULATOR

The LM3402/02HV contains an internal linear regulator with a 7V output, connected between the VIN and the

VCC pins. The VCC pin should be bypassed to the GND pin with a 0.1 µF ceramic capacitor connected as close

as possible to the pins of the IC. VCC tracks VIN until VIN reaches 8.8V (typical) and then regulates at 7V as

VIN increases. Operation begins when VCC crosses 5.25V.

INTERNAL MOSFET AND DRIVER

The LM3402/02HV features an internal power MOSFET as well as a floating driver connected from the SW pin to

the BOOT pin. Both rise time and fall time are 20 ns each (typical) and the approximate gate charge is 3 nC. The

high-side rail for the driver circuitry uses a bootstrap circuit consisting of an internal high-voltage diode and an

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