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LM3686 Datasheet(PDF) 6 Page - Texas Instruments |
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LM3686 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 28 page LM3686 SNVS520D – AUGUST 2008 – REVISED MARCH 2011 www.ti.com Electrical Characteristics (1) (2) (3) (4) Linear Regulator — LILO (EN_DCDC = EN_LILO = ON - Large NMOS) Limits in standard typeface are for TA = 25°C. Limits appearing in boldface type apply over the full operating ambient temperature range: -40°C ≤ TA= TJ ≤ +85°C. Unless otherwise noted, specifications apply to the closed loop typical application circuits (linear regulator) with VIN_LDO = VBATT = 3.6V (5) , V IN_LILO = VOUT_DCDC(NOM), VEN (All) = VBATT, CIN_DC = 4.7 µF, COUT_LILO = 2.2 µF, CIN_LDO = 1.0 µF , COUT_LDO = 1.0 µF ,COUT_DC = C IN_LILO = 10 µF Limits Symbol Parameter Condition Units Min Typ Max ΔVOUT_LILO / Output Voltage IOUT_LILO = 1 mA to 350 mA 1.2 VOUT_LILO Accuracy, VIN_LILO = VOUT_DCDC 1.176 1.224 V VOUT_LILO VBATT = 3.6V IOUT_LILO = 1 mA & 350 mA 4 12 µV/mA ΔVOUT_LILO / ΔmA Load Regulation (6) VIN_LILO = VOUT_DCDC VBATT = 3.6V VBATT = VOUT_LILO + 1.5V 50 80 mV (VIN_LILO disconnected from VDROP Dropout Voltage (7) VOUT_DCDC), IOUT = 350 mA IQ_VIN_LILO Quiescent Current VBATT = VIN_LILO = 3.6V 70 90 µA ISC_LILO Short Circuit Current VOUT = GND (VOUT_LILO = 0 ) 400 mA Limit LILO (EN_DCDC = OFF, EN_LILO = ON - SMALL NMOS) ΔVOUT_LILO / Output Voltage IOUT = 1 mA to 50 mA 1.176 1.224 VOUT_LILO Accuracy, V VOUT_LILO ΔVOUT_LILO / Line Regulation VIN_LILO = (VOUT_LILO + 0.3V) to 5.5V 0.4 1.5 mV/V ΔVBATT (Small NMOS) (8) ISC_LILO Short circuit current VOUT_LILO = GND 70 mA TSTARTUP Start up time EN to 0.95VOUT 70 µS System Characteristic(9) PSRR Signal to VBATT = 3.6V, VIN_LILO = 1.8V 68 IOUT = 200 mA, Power Supply Rejection f = 100 Hz dB Ratio(10) Signal to VIN_LILO = 1.8V IOUT = 200 mA, 60 f = 1kHz eN_LILO BW = 10 Hz to 100 kHz, VIN_LILO = 1.8V, Output Noise voltage(10) 166 µVRMS IOUT = 200 mA, VIN_LDO = 3.6V ΔVOUT_LILO Dynamic load transient Pulsed load 1 mA - 350 mA +/- 30 mV response di/dt = 350 mA/1µS (1) All voltages are with respect to the potential at the GND pin. (2) Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (typ.) numbers are not guaranteed, but do represent the most likely norm. Unless otherwise specified, conditions for typ. specifications are: VBATT = 3.6V and TA = 25°C. (3) The parameters in the electrical characteristic table are tested at VBATT = 3.6V unless otherwise specified. For performance over the input voltage range refer to datasheet curves. (4) The input voltage range recommended for ideal applications performance for the specified output voltages is given below:VBATT = 2.7V to 5.5V for 1.0V ≤ VOUT_DCDC < 1.8VVBATT = (VOUT_DCDC + 1V) to 5.5V for 1.8V ≤ VOUT_DCDC < 3.6V (5) VIN_LDO must be ON at all time for biasing internal reference circuits (6) To calculate the output voltage from the load regulation specified, use the following equation: ΔVOUT = Load Regulation (%/mA) x Nominal VOUT (V) x ΔIOUT (mA). (7) Dropout voltage is defined as the input to output voltage differential at which the output voltage falls to 100 mV below the nominal output voltage. (8) To calculate the output voltage from the line regulation specified, use the following equation: ΔVOUT = Line Regulation (%/V) x Nominal VOUT (V) x ΔVIN (V). (9) Parameters guaranteed by design. (10) The noise performance target is applied to PWM mode operation and this does not apply when DCDC converter is operating in PFM mode. 6 Submit Documentation Feedback Copyright © 2008–2011, Texas Instruments Incorporated Product Folder Links: LM3686 |
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