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MB90522PFF Datasheet(PDF) 3 Page - Fujitsu Component Limited. |
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MB90522PFF Datasheet(HTML) 3 Page - Fujitsu Component Limited. |
3 / 106 page MB90520 Series 3 (Continued) • 16-bit I/O timer 16-bit free-run timers 1, 2: 2 channels Input captures 0, 1 (ICU): Generates an interrupt request by latching a 16-bit free-run timer counter value upon detection of an edge input to the pin. Output compares 0, 1 (OCU): Generates an interrupt request and reverses the output level upon detection of a match between the 16-bit free-run timer counter value and the compare setting value. 8/16-bit up/down counter/timers 0, 1: 1 channel (8-bit × 2 channels) • Extended I/O serial interfaces 0, 1: 1 channel •UART (SCI) With full-duplex double buffer Clock asynchronized or clock synchronized transmission can be selectively used. • DTP/external interrupt circuit (8 channels) A module for starting extended intelligent I/O service (EI2OS) and generating an external interrupt triggered by an external input. • Wake-up interrupt Receives external interrupt requests and generates an interrupt request upon an “L” level input. • Delayed interrupt generation module Generates an interrupt request for switching tasks. • 8/10-bit A/D converter (8 channels) 8/10-bit resolution can be selectively used. Starting by an external trigger input. Conversion time: minimum 15.0 µs (at machine clock frequency of 16 MHz, including sampling time) • 8-bit D/A converter (based on the R-2R system) 8-bit resolution: 2 channels (independent) Setup time: 12.5 µs • Clock timer: 1 channel • LCD controller/driver A common driver and a segment driver that can directly drive the LCD (liquid crystal display) panel • Clock output function Note: Do not set external bus mode for the MB90520 series because it cannot be operated in this mode. |
Similar Part No. - MB90522PFF |
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Similar Description - MB90522PFF |
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