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MB90611A Datasheet(PDF) 6 Page - Fujitsu Component Limited. |
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MB90611A Datasheet(HTML) 6 Page - Fujitsu Component Limited. |
6 / 91 page 6 MB90610A Series s PIN DESCRIPTION (Continued) *1: FPT-100P-M05 *2: FPT-100P-M06 Pin no. Pin name Circuit type Function LQFP*1 QFP*2 80 81 82 83 X0 X1 A (Oscillator) Crystal oscillator pins 83 to 90 85 to 92 D00 to D07 K (TTL) In non-multiplex mode, the I/O pins for the lower 8 bits of the external data bus. AD00 to AD07 In multiplexed mode, the I/O pins for the lower 8 bits of the external address/data bus. 91 to 98 93 to 100 P10 to P17 K (TTL) General purpose I/O ports This applies in non-multiplexed mode with an 8-bit external data bus. P08 to D15 In non-multiplexed mode, the I/O pins for the upper 8 bits of the external data bus This applies when using a 16-bit external data bus. AD08 to AD15 In multiplexed mode, the I/O pins for the upper 8 bits of the external address/data bus. 99 100 1 to 6 1 to 8 P20 to P27 B (CMOS) General purpose I/O ports This applies in multiplexed mode. A00 to A07 In non-multiplexed mode, the output pins for the lower 8 bits of the external address bus. 7 8 10 to 15 9 10 12 to 17 P30 to P37 B (CMOS) General purpose I/O ports This applies in multiplexed mode. A08 to A15 In non-multiplexed mode, the output pins for the upper 8 bits of the external address bus. 16 to 20 22 to 24 18 to 22 24 to 26 P40 to P47 B (CMOS) General purpose I/O ports This applies when the upper address control register specifies port operation. A16 to A23 The output pins for A16 to 23 of the external address bus This applies when the upper address control register specifies address operation. 25 to 28 27 to 30 P70 to P73 H (CMOS/H) General purpose I/O ports This applies in all cases. INT0 to INT3 External interrupt request input pins As the inputs operate continuously when external interrupts are enabled, output to the pins from other functions must be stopped unless done intentionally. |
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