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MB90F549 Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB90F549 Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
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4 / 56 page  MB90540/545 Series 4 s s s s PRODUCT LINEUP The following table provides a quick outlook of the MB90540/545 Series (Continued) Features MB90F543 MB90F549 MB90V540 Classification Flash ROM product Evaluation product ROM size 128 Kbytes Boot Block 256 Kbytes Boot Block None ROM size 6 K 8 K CPU functions The number of instructions: 351 Instruction bit length: 8 bits, 16 bits Instruction length: 1 byte to 7 bytes Data bit length: 1bit, 8 bits, 16 bits Minimum execution time: 62.5 ns (at machine clock frequency of 16 MHz) Interrupt processing time: 1.5 µs (at machine clock frequency of 16 MHz, minimum value) UART 0 Clock synchronized transmission (500 K / 1M / 2 Mbps) Clock asynchronized transmission (4808 / 5208 / 9615 / 10417 / 19230 / 38460 / 62500 /500000 bps at machine clock frequency of 16 MHz) Transmission can be performed by bi-directional serial transmission or by master/slave connection. UART 1 (SCI) Clock synchronized transmission (62.5 K/ 12 K/ 250 K/ 500 K/ 1 Mbps) Clock asynchronized transmission (1202/ 2404/ 4808/ 9615/ 31250 bps) Transmission can be performed by bi-directional serial Transmission or by master / slave connection. 8/10-bit A/D converter Conversion precision: 8/10-bit can be selectively used. Number of inputs: 8 One-shot conversion mode (converts selected channel once only) Scan conversion mode (converts two or mode successive channels and can program up to 8 channels) Continuous conversion mode (converts selected channel continuously) Stop conversion mode (converts selected channel and stop operation repeatedly) 8/16-bit PPG timers Number of channels: 8/16 bit × 4 channels PPG operation of 8-bit or 16 bit A pulse wave of given intervals and given duty ratios can be output. Pulse interval: fsys, fsys/21, fsys/22, fsys/23, fsys/24, 128 µs (at oscillation of 4 MHz, fsys = machine clock frequency of 16 MHz, fosc = oscillation clock frequency) 16-bit Reload timer Number of channels:2 Operation clock frequency: fsys/21, fsys/23, fsys/25 (fsys = System clock frequency) Supports External Event Count function 16-bit I/O timer 16-bit Output com- pares Number of channels: 4 Pin input factor: A match signal of compare register Input cap- tures Number of channels: 8 Rewriting a register value upon a pin input (rising, falling, or both edges) |
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