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PESD5V0S1BLD Datasheet(PDF) 8 Page - NXP Semiconductors |
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PESD5V0S1BLD Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 13 page PESD5V0S1BLD All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 12 October 2010 8 of 13 NXP Semiconductors PESD5V0S1BLD Low capacitance bidirectional ESD protection diode 7. Application information The PESD5V0S1BLD is designed for the protection of one bidirectional data or signal line from the damage caused by ESD and surge pulses. The device may be used on lines where the signal polarities are both, positive and negative with respect to ground. The PESD5V0S1BLD provides a surge capability of 130 W per line for an 8/20 μs waveform. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the device as close to the input terminal or connector as possible. 2. The path length between the device and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. Fig 10. Application diagram 006aaa057 PESD5V0S1Bx GND signal line |
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