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TLC3541IDG4 Datasheet(PDF) 5 Page - Texas Instruments

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Part # TLC3541IDG4
Description  200-KSPS Sampling Rate Built-In Conversion Clock
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TLC3541IDG4 Datasheet(HTML) 5 Page - Texas Instruments

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TLC3541, TLC3545
SLAS345 − DECEMBER 2001
5
www.ti.com
electrical characteristics over recommended operating free-air temperature range,
VDD = 5 V, VREF = 4.096 V, SCLK frequency = 15 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
VDD = 4.5 V,
IOH = −0.2 mA
3.9
V
VOL
Low-level output voltage
VDD = 4.5 V
IOL = 0.8 mA
0.4
V
IOZ
Off-state output current
VO = VDD,
CS = VDD
1
2.5
A
IOZ
Off-state output current
(high-impedance-state)
VO = 0,
CS = VDD
−1
−2.5
µA
IIH
High-level input current
VI = VDD
0.005
2.5
µA
IIL
Low-level input current
VI = 0
−0.005
2.5
µA
ICC
Operating supply current
CS at 0 V,
VDD = 4.5 V to 5.5 V
3.5
mA
ICC(PD) Power-down supply current
For all digital inputs, 0
≤ VI ≤ 0.3 V
or VI ≥ VDD − 0.3 V, SCLK=VDD,
VDD = 4.5 V to 5.5 V
3
5
µA
Selected analog input channel leakage
Selected channel at VDD
1
A
Selected analog input channel leakage
current
Selected channel at 0 V
−1
µA
Ci
Input capacitance
Analog inputs
11
14
pF
Ci
Input capacitance
Control Inputs
20
25
pF
Zi
Input resistance
VDD = 5.5 V
500
ac specifications (TLC3541/45)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SINAD
Signal-to-noise ratio +distortion
fI = 15 kHz at 200 KSPS
81.5
dB
SNR
Signal-to-noise ratio
fI = 15 kHz at 200 KSPS
82
dB
THD
Total harmonic distortion
TLC3541
fI = 15 kHz at 200 KSPS
−94
−87
dB
THD
Total harmonic distortion
TLC3545
fI = 15 kHz at 200 KSPS
−94
−89
dB
ENOB
Effective number of bits
fI = 15 kHz at 200 KSPS
13.2
Bits
SFDR
Spurious free dynamic range
TLC3541
fI = 15 kHz at 200 KSPS
−95
−87
dB
SFDR
Spurious free dynamic range
TLC3545
fI = 15 kHz at 200 KSPS
−95
−89
dB
Full-power bandwidth, −3 dB, analog input
1
MHz
Full-power bandwidth, −1 dB, analog input
500
kHz
Crosstalk
0.25 LSB
80
dB
dc specifications (TLC3541/45)
PARAMETER
TEST CONDITIONS
MIN
TYP†
MAX
UNIT
INL
Integral linearity error (see Note 1)
−1
1
LSB
DNL
Differential linearity error
−1
0.75
1
LSB
EO
Offset error (see Note 2)
TLC3541
−3.5
3.5
mV
EO
Offset error (see Note 2)
TLC3545
−1
1
mV
EG
Gain error (see Note 2)
TLC3541
−2
2
mV
EG
Gain error (see Note 2)
TLC3545
−1.8
1.8
mV
† All typical values are at VDD = 5 V, TA = 25°C.
NOTES:
1. Linear error is the maximum deviation from the best straight line through the A/D transfer characteristics.
2. Zero error is the difference between 0000h and the converted output for zero input voltage: full-scale error is the difference between
ideal full-scale and the converted output for full-scale input voltage.


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