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ADS4146 Datasheet(PDF) 8 Page - Texas Instruments |
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ADS4146 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 83 page  ADS4126 , ADS4129 ADS4146 , ADS4149 SBAS483G – NOVEMBER 2009 – REVISED JANUARY 2011 www.ti.com DIGITAL CHARACTERISTICS Typical values are at +25°C, AVDD = 1.8V, DRVDD = 1.8V, and 50% clock duty cycle, unless otherwise noted. Minimum and maximum values are across the full temperature range: TMIN = –40°C to TMAX = +85°C, AVDD = 1.8V, and DRVDD = 1.8V. ADS4126, ADS4129, ADS4146, ADS4149 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUTS (RESET, SCLK, SDATA, SEN, OE) High-level input voltage RESET, SCLK, SDATA, and 1.3 V SEN support 1.8V and 3.3V Low-level input voltage 0.4 V CMOS logic levels High-level input voltage 1.3 V OE only supports 1.8V CMOS logic levels Low-level input voltage 0.4 V High-level input current: SDATA, SCLK(1) VHIGH = 1.8V 10 µA High-level input current: SEN VHIGH = 1.8V 0 µA Low-level input current: SDATA, SCLK VLOW = 0V 0 µA Low-level input current: SEN VLOW = 0V 10 µA DIGITAL OUTPUTS (CMOS INTERFACE: D0 TO D13, OVR_SDOUT) High-level output voltage DRVDD – 0.1 DRVDD V Low-level output voltage 0 0.1 V DIGITAL OUTPUTS (LVDS INTERFACE: DA0P/M TO DA13P/M, DB0P/M TO DB13P/M, CLKOUTP/M) High-level output voltage(2) VODH Standard swing LVDS 270 +350 430 mV Low-level output voltage(2) VODL Standard swing LVDS –430 –350 –270 mV High-level output voltage(2) VODH Low swing LVDS +200 mV Low-level output voltage(2) VODL Low swing LVDS –200 mV Output common-mode voltage VOCM 0.85 1.05 1.25 V (1) SDATA and SCLK have an internal 180k Ω pull-down resistor. (2) With an external 100 Ω termination. 8 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): ADS4126 ADS4129 ADS4146 ADS4149 |
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