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ADP3050ARZ-5 Datasheet(PDF) 15 Page - Analog Devices |
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ADP3050ARZ-5 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 20 page  Data Sheet ADP3050 Rev. C | Page 15 of 20 shows the approximate unity-gain frequency of the loop. Again, always check the design over its full operating range of input voltage, output current, and temperature to ensure that the loop is compensated correctly. In addition to setting the zero location, RC also sets the high frequency gain of the error amplifier. If this gain is too large, output ripple voltage appears at the COMP pin (the output of the error amplifier) with enough amplitude to interfere with normal regulator operation. If this occurs, subharmonic switching results (the pulse width of the switch waveform changes, even though the output voltage stays regulated). The voltage ripple at the COMP pin should be kept below 100 mV to prevent subharmonic switching from occurring. The amount of ripple can be estimated by the following formula, where gm is the error amplifier transconductance (gm = 1250 μMho): ( ) ( ) OUT FB RIPPLE C m RIPPLE COMP V V ESR I R g V × × × × = , (10) For example, a 12 V to 5 V, 800 mA regulator with an inductor of L = 47 μH has IRIPPLE = 310 mA (see example from the Continuous Mode section) if a 100 μF tantalum output capacitor with a maximum ESR of 100 mΩ and compensation values of RC = 4 kΩ and CC = 1 nF are used. The ripple voltage at the COMP pin is ( ) ( ) mV 2 . 37 0 . 5 20 . 1 1 . 0 310 . 0 10 4 10 1250 3 6 , = × × × × × × = − RIPPLE COMP V (11) If this ripple voltage is more than 100 mV, RC needs to be decreased to prevent subharmonic switching. Typical values for RC are in the range of 2 kΩ to 10 kΩ. For output voltages greater than 5 V, it may be necessary to add a small capacitor in parallel with R2, as shown in Figure 25. This improves stability and transient response. For tantalum output capacitors, the typical value for CF is 100 pF. For ceramic output capacitors, the typical value for CF is 400 pF. CURRENT LIMIT/FREQUENCY FOLDBACK The ADP3050 uses a cycle-by-cycle current limit to protect the device under fault and high stress conditions. When the current limit is exceeded, the power switch turns off until the beginning of the next oscillator cycle. If the voltage on the feedback pin drops below 80% of its nominal value, the oscillator frequency starts to decrease (see Figure 17 in the Typical Performance Characteristics section). The frequency gradually reduces to a minimum value of approximately 80 kHz (this minimum occurs when the feedback voltage falls to 30% of its nominal value). This reduces the power dissipation in the IC, the external diode, and the inductor during short-circuit conditions. This frequency foldback method provides complete device fault protection without interfering with the normal device operation. BIAS PIN CONNECTION To help improve efficiency, most of the internal operating current can be drawn from the lower voltage regulated output voltage instead of the input supply. For example, if the input voltage is 24 V and the output voltage is 5 V, a quiescent current of 4 mA wastes 96 mW if drawn from the input supply, but only 20 mW is drawn from the regulated 5 V output. This power savings is most evident at high input voltages and low load currents. The output voltage must be 3 V or higher to take advantage of this feature. BOOSTED DRIVE STAGE An external capacitor and diode are used to provide the boosted voltage needed for the special drive stage. If the output voltage is above 4 V, connect the anode of the boost diode to the regulated output; for output voltages less than or equal to voltages of ≤3 V, connect it to the input supply. For some low voltage systems, such as 5 V to 3.3 V converters, the anode of the boost diode can be connected to either the input or output voltage. During switch off time, the boost capacitor is charged up to the voltage at the anode of the boost diode. When the switch turns on, this voltage is added to the switch voltage (the boost diode is reverse- biased), providing a voltage higher than the input supply. The peak voltage appearing on the BOOST pin is the sum of the input voltage and the boost voltage (either VIN + VOUT or 2 × VIN). Ensure that this peak voltage does not exceed the BOOST pin maximum rating of 45 V. For most applications, a 1N4148 or 1N914 type diode can be used with a 220 nF capacitor. A 470 nF capacitor may be needed for output voltages between 3 V and 4 V. The boost capacitor should have an ESR of less than 2 Ω to ensure that it is adequately charged up during switch off time. Almost any type of film or ceramic capacitor can be used. START-UP/MINIMUM INPUT VOLTAGE For most designs, the regulated output voltage provides the boosted voltage for the drive stage. During startup, the output voltage is 0, so there is no boosted supply for the drive stage. To deal with this problem, the ADP3050 contains a backup drive stage to get everything started. As the output voltage increases, so does the boost voltage. When the boost voltage reaches approx- imately 2.5 V, the switch drives transition smoothly from the backup driver to the boosted driver. If the boost voltage decreases below approximately 2.5 V, resulting in a short-circuit or overload condition, the backup stage takes over to provide switch drive. The minimum input voltage needed for the ADP3050 to function correctly is about 3.6 V (this ensures proper operation of the internal circuitry), but a small amount of headroom is needed for all step-down regulators. The following formula gives the approximate minimum input voltage needed for a given system, where VSAT is the switch saturation voltage (see Figure 15 for the appropriate value of VSAT). Figure 13 also shows the typical minimum input voltage needed for 3.3 V and 5 V systems. |
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