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HT48R05A Datasheet(PDF) 6 Page - Holtek Semiconductor Inc

Part # HT48R05A
Description  8-Bit OTP Microcontroller
Download  44 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT48R05A Datasheet(HTML) 6 Page - Holtek Semiconductor Inc

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HT48R05A-1
6
February 25, 2000
Preliminary
Functional Description
Execution flow
The system clock for the microcontroller is de-
rived from either a crystal or an RC oscillator.
The system clock is internally divided into four
non-overlapping clocks. One instruction cycle
consists of four system clock cycles.
Instruction fetching and execution are
pipelined in such a way that a fetch takes an in-
struction cycle while decoding and execution
takes the next instruction cycle. However, the
pipelining scheme causes each instruction to ef-
fectively execute in a cycle. If an instruction
changes the program counter, two cycles are re-
quired to complete the instruction.
Program counter - PC
The program counter (PC) controls the se-
quence in which the instructions stored in pro-
gram PROM are executed and its contents
specify full range of program memory.
After accessing a program memory word to fetch
an instruction code, the contents of the program
counter are incremented by one. The program
counter then points to the memory word contain-
ing the next instruction code.
When executing a jump instruction, conditional
skip execution, loading PCL register, subrou-
tine call, initial reset, internal interrupt, exter-
nal interrupt or return from subroutine, the PC
manipulates the program transfer by loading
the address corresponding to each instruction.
The conditional skip is activated by instruc-
tions. Once the condition is met, the next in-
struction, fetched during the current
instruction execution, is discarded and a
dummy cycle replaces it to get the proper in-
struction. Otherwise proceed with the next in-
struction.
The lower byte of the program counter (PCL) is
a readable and writable register (06H). Moving
data into the PCL performs a short jump. The
destination will be within 256 locations.
When a control transfer takes place, an addi-
tional dummy cycle is required.
Program memory - PROM
The program memory is used to store the pro-
gram instructions which are to be executed. It
also contains data, table, and interrupt entries,
and is organized into 512´14 bits, addressed by
the program counter and table pointer.
T1
T2
T3
T4
T1
T2
T3
T4
T1
T2
T3
T4
F e tc h IN S T ( P C )
E x ec ut e I N S T ( P C - 1 )
F e tc h IN S T ( P C + 1 )
E x ec ut e I N S T ( P C )
F e tc h IN S T ( P C + 2 )
E x ec ut e I N S T ( P C + 1 )
PC
PC + 1
PC + 2
S yst e m C l o ck
O S C2 ( RC o n l y )
PC
Execution flow


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