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74VHC32SJ Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74VHC32SJ Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 10 page ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC32 Rev. 1.3.0 February 2008 74VHC32 Quad 2-Input OR Gate Features ■ High Speed: tPD = 3.8ns (typ.) at VCC = 5V ■ Low Power Dissipation: ICC = 2 µA (max.) at TA = 25°C ■ High Noise Immunity: VNIH = VNIL = 28% VCC (min.) ■ Power down protection is provided on all inputs ■ Low Noise: VOLP = 0.8V (max.) ■ Pin and Function Compatible with 74HC32 General Description The VHC32 is an advanced high speed CMOS 2-Input OR Gate fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as bat- tery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Information Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Order Number Package Number Package Description 74VHC32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC32N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide |
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