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ICS604M Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS604M Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 4 page ICS604 Intel Graphics Clock Source MDS 604 A 2 Revision 022499 Printed 11/14/00 Integrated Circuit Systems • 525 Race Street • San Jose • CA • 95126 •(408)295-9800tel•(408)295-9818fax PRELIMINARY PRELIMINARY INFORMATION INFORMATION Pin Assignment Pin Descriptions Key: I = Input; O = output; XI, XO = crystal connections; P = power supply connection 1 8 2 3 4 7 6 5 X1/ICLK VDDC GND 14.3M X2 VDDIO 24.576M 48M External Components / Crystal Selection The ICS604 requires 0.01 µF decoupling capacitors to be connected between VDDC and GND, and between VDDIO and GND. They must be connected close to the ICS604 to minimize lead inductance. No external power supply filtering is required for this device. A 33 Ω terminating resistor can be used next to the output pins when driving 50 Ω lines. The total on-chip crystal capacitance is approximately 6 pF, and a parallel resonant, fundamental mode crystal should be used. Crystal capacitors should be connected from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL-6)*2, where CL is the crystal load capacitance in pF. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). Number Name Type Description 1 X1/ICLK XI Crystal connection for 14.31818 MHz crystal, or clock input. 2 VDDC P Connect to +3.3V or +5V. +5 V recommended for lowest output noise (jitter). 3 GND P Connect to ground. 4 14.3M O Buffered crystal oscillator output clock. 5 48M O 48.0 MHz clock output for Intel graphics controller. 6 24.576M O 24.576 MHz clock output. 7 VDDIO P Connect to +3.3 V or +5 V. Cannot be greater than VDDC. 8 X2 XO Crystal connection for 14.31818 MHz crystal. Leave unconnected for clock input. |
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