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ICS9120M-47 Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS9120M-47 Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 5 page 2 ICS9120-47 Pin Configuration Pin Descriptions for ICS9120-47 8-Pin SOIC External Components/Crystal Selection The ICS9120-47 incorporates a crystal oscillator circuit de-signed to provide 50% duty cycle over a range of operating conditions, including the addition of external crystal load ca-pacitors to pins X1 and X2. For the crystal oscillator, the crystal load capacitance must be connected externally by adding a capacitor from each of the X1 and X2 pins to ground. A parallel resonant 16.9344 MHz crystal is recommended. Duty cycle is also maintained when using an external clock source (connected to X1, X2 left unconnected) as long as the external clock has good duty cycle. PIN NUMBER PIN NAME TYPE DESCRIPTION 1 X1 Input Crystal or external clock source. Has feedback bias for crystal. Nominally 16.9344 MHz input applied. (No internal load cap; must connect external load cap to ground for crystal oscillator). 2 VDD Power +Power supply input. 3 GND Power Ground return for Pin 2. 4 CLK3 Output 33.8688 MHz target output clock (with nominal 16.9344 MHz input). 5 CLK2 Output 22.5792 MHz target output clock (with nominal 16.9344 MHz input). 6 CLK4 Output 50.8032 MHz target output clock (with nominal 16.9344 MHz input). 7 REFCLK Output 16.9344 MHz reference clock buffered output (with nominal 16.9344 MHz input). 8 X2 Output Crystal output drive (leave this pin unconnected when using an external clock). (No internal load cap; must connect external load cap to ground for crystal oscillator). |
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