7.2

5

IDT71256S/L

CMOS STATIC RAM 256K (32K x 8-BIT)

MILITARY AND COMMERCIAL TEMPERATURE RANGES

2946 drw 06

DATA

RETENTION

MODE

4.5V

4.5V

≥2V

CS

± 10%, All Temperature Ranges)

71256S25

71256S30

(3)

71256S35

71256S45

71256L20

(1)

71256L25

71256L30

(3)

71256L35

71256L45

Symbol

Parameter

Min.

Max.

Min. Max.

Min.

Max.

Min.

Max.

Min. Max. Unit

Read Cycle

Read Cycle Time

20

—

25

—

30

—

35

—

45

—

ns

Address Access Time

—

20

—

25

—

30

—

35

—

45

ns

Chip Select Access Time

—

20

—

25

—

30

—

35

—

45

ns

(2)

Chip Select to Output in Low-Z

5

—

5

—

5

—

5

—

5

—

ns

(2)

Chip Deselect to Output in High-Z

—

10

—

11

—

15

—

15

—

20

ns

Output Enable to Output Valid

—

10

—

11

—

13

—

15

—

20

ns

(2)

Output Enable to Output in Low-Z

2

—

2

—

2

—

2

—

0

—

ns

(2)

Output Disable to Output in High-Z

2

8

2

10

2

12

2

15

—

20

ns

Output Hold from Address Change

5

—

5

—

5

—

5

—

5

—

ns

Write Cycle

Write Cycle Time

20

—

25

—

30

—

35

—

45

—

ns

Chip Select to End-of-Write

15

—

20

—

25

—

30

—

40

—

ns

Address Valid to End-of-Write

15

—

20

—

25

—

30

—

40

—

ns

Address Set-up Time

0

—

0

—

0

—

0

—

0

—

ns

Write Pulse Width

15

—

20

—

25

—

30

—

35

—

ns

Write Recovery Time

0

—

0

—

0

—

0

—

0

—

ns

Data to Write Time Overlap

11

—

13

—14

—

15

—

20

—

ns

(2)

Write Enable to Output in High-Z

—

10

—

11

—

15

—

15

—

20

ns

Data Hold from Write Time

0

—

0

—

0

—

0

—

0

—

ns

(2)

Output Active from End-of-Write

5

—

5

—

5

—

5

—

5

—

ns

NOTES:

2946 tbl 11

1. 0

° to +70°C temperature range only.

2. This parameter guaranteed by device characterization, but is not production tested.

3. –55

° to +125°C temperature range only.