IDT7198S35LB datasheet(2/8 Pages) IDT

Part #	IDT7198S35LB

Description	CMOS STATIC RAMs 64K (16K x 4-BIT) Added Chip Select and Output Controls

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Manufacturer	IDT [Integrated Device Technology]

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6.4

2

IDT7198S/L

CMOS STATIC RAM 64K (16K x 4-BIT) Added Chip Select and Output Enable Controls

MILITARY TEMPERATURE RANGE

MEMORY CONTROL

The IDT7198 64K high-speed CMOS static RAM incorpo-

rates two additional memory control features (an extra chip

select and an output enable pin) which offer additional ben-

efits in many system memory applications.

Both chip selects, Chip Select 1 (

CS1) and Chip Select 2

(

CS2), must be LOW to select the memory. If either chip select

is pulled HIGH, the memory will be deselected and remain in

the standby mode. This dual chip select feature (

CS1, CS2)

also brings the convenience of improved system speeds to the

large memory designer by reducing the external logic required

to perform decoding.

PIN DESCRIPTIONS

Name

Description

A0–A13

Address Inputs

CS1

Chip Select 1

CS2

Chip Select 2

WE

Write Enable

OE

Output Enable

I/O0–I/O3

Data I/O

VCC

Power

GND

Ground

2985 tbl 01

TRUTH TABLE

(1)

Mode

CS1 CS

CS2

WE

OE

I/O

Power

Standby

H

X

High-Z

Standby

X

H

X

High-Z

Standby

Read

L

H

L

DOUT

Active

Write

L

X

DIN

Active

Read

L

H

High-Z

Active

NOTE:

2985 tbl 02

1. H = VIH, L = VIL, X = don't care.

5

6

7

8

9

10

11

L28-2

26

25

24

23

13 14 15 16 17

32

1

28 27

INDEX

A5

A6

A12

A11

A10

CS

12

22

21

A3

A4

2985 drw 03

A7

A8

20

19

18

A9

4

1

A2

A1

A13

NC

I/O3

I/O2

I/O1

LCC

TOP VIEW

PIN CONFIGURATIONS

2985 drw 02

5

6

7

8

9

10

11

12

A0

1

2

3

4

24

23

22

21

20

19

18

17

D24-1

E24-1

A1

A2

A3

A4

A5

A6

A7

A8

CS

VCC

WE

A12

A11

A10

16

15

OE

GND

A9

A13

1

CS2

16

15

I/O3

I/O2

I/O1

I/O0

DIP/SOJ/CERPACK

TOP VIEW

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Rating

Mil.

Unit

VTERM

Terminal Voltage

–0.5 to +7.0

V

with Respect to GND

TA

Operating Temperature

–55 to +125

°C

TBIAS

Temperature

–65 to +135

°C

Under Bias

TSTG

Storage Temperature

–65 to +150

°C

PT

Power Dissipation

1.0

W

IOUT

DC Output Current

50

mA

NOTE:

2985 tbl 03

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of this

specification is not implied. Exposure to absolute maximum rating condi-

tions for extended periods may affect reliability.

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