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IDT6198L85DB Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT6198L85DB Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 8 page 6.3 4 IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES (L Version Only) VLC = 0.2V, VHC = VCC - 0.2V Typ. (1) Max. VCC @VCC @ Symbol Parameter Test Condition Min. 2.0v 3.0V 2.0V 3.0V Unit VDR VCC for Data Retention — 2.0 — — — — V ICCDR Data Retention Current MIL. — 10 15 600 900 µA COM’L. — 10 15 150 225 tCDR (3) Chip Deselect to Data CS ≥ VHC 0— — — — ns Retention Time VIN ≥ VHC or ≤ VLC tR (3) Operation Recovery Time tRC (2) —— —— ns |ILI| (3) Input Leakage Current — — — 2 2 µA NOTES: 2987 tbl 09 1. TA = +25 °C. 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization but is not production tested. LOW VCC DATA RETENTION WAVEFORM 2987 drw 04 DATA RETENTION MODE 4.5V 4.5V VDR ≥2V VIH VIH tR tCDR VCC CS VDR 2987 drw 06 480 Ω 5pF* 255 Ω DATAOUT 5V 2987 drw 05 480 Ω 30pF* 255 Ω DATAOUT 5V AC TEST CONDITIONS Input Pulse Levels GND to 3.0V Input Rise/Fall Times 5ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V AC Test Load See Figures 1 and 2 2987 tbl 10 Figure 1. AC Test Load Figure 2. AC Test Load (for tOLZ, tCLZ, tOHZ, tWHZ, tCHZ and tOW) *Includes scope and jig capacitances |
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